1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart@augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#ifndef _EHCI_H_ 33#define _EHCI_H_ 34 35#include <sys/endian.h> 36 37#define EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 38 39/* 40 * Alignment NOTE: structures must be aligned so that the hardware can index 41 * without performing addition. 42 */ 43#define EHCI_FRAMELIST_ALIGN 0x1000 /* bytes */ 44#define EHCI_FRAMELIST_COUNT 1024 /* units */ 45#define EHCI_VIRTUAL_FRAMELIST_COUNT 128 /* units */ 46 47#if ((8 * EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER) 48#error "maximum number of high-speed isochronous frames is higher than supported!" 49#endif 50 51#if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 52#error "maximum number of full-speed isochronous frames is higher than supported!" 53#endif 54 55/* Link types */ 56#define EHCI_LINK_TERMINATE 0x00000001 57#define EHCI_LINK_TYPE(x) ((x) & 0x00000006) 58#define EHCI_LINK_ITD 0x0 59#define EHCI_LINK_QH 0x2 60#define EHCI_LINK_SITD 0x4 61#define EHCI_LINK_FSTN 0x6 62#define EHCI_LINK_ADDR(x) ((x) &~ 0x1f) 63 64/* Structures alignment (bytes) */ 65#define EHCI_ITD_ALIGN 128 66#define EHCI_SITD_ALIGN 64 67#define EHCI_QTD_ALIGN 64 68#define EHCI_QH_ALIGN 128 69#define EHCI_FSTN_ALIGN 32 70/* Data buffers are divided into one or more pages */ 71#define EHCI_PAGE_SIZE 0x1000 72#if ((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) || \ 73 (USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) || \ 74 (USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) || \ 75 (USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) || \ 76 (USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) || \ 77 (USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0)) 78#error "Invalid USB page size!" 79#endif 80 81/* 82 * Isochronous Transfer Descriptor. This descriptor is used for high speed 83 * transfers only. 84 */ 85struct ehci_itd { 86 volatile uint32_t itd_next; 87 volatile uint32_t itd_status[8]; 88#define EHCI_ITD_SET_LEN(x) ((x) << 16) 89#define EHCI_ITD_GET_LEN(x) (((x) >> 16) & 0xFFF) 90#define EHCI_ITD_IOC (1 << 15) 91#define EHCI_ITD_SET_PG(x) ((x) << 12) 92#define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7) 93#define EHCI_ITD_SET_OFFS(x) (x) 94#define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF) 95#define EHCI_ITD_ACTIVE (1U << 31) 96#define EHCI_ITD_DATABUFERR (1 << 30) 97#define EHCI_ITD_BABBLE (1 << 29) 98#define EHCI_ITD_XACTERR (1 << 28) 99 100#define EHCI_ITD_BP_MAX 7 101 volatile uint32_t itd_bp[EHCI_ITD_BP_MAX]; 102 /* itd_bp[0] */ 103#define EHCI_ITD_SET_ADDR(x) (x) 104#define EHCI_ITD_GET_ADDR(x) (((x) >> 0) & 0x7F) 105#define EHCI_ITD_SET_ENDPT(x) ((x) << 8) 106#define EHCI_ITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 107 /* itd_bp[1] */ 108#define EHCI_ITD_SET_DIR_IN (1 << 11) 109#define EHCI_ITD_SET_DIR_OUT (0 << 11) 110#define EHCI_ITD_SET_MPL(x) (x) 111#define EHCI_ITD_GET_MPL(x) (((x) >> 0) & 0x7FF) 112 volatile uint32_t itd_bp_hi[EHCI_ITD_BP_MAX]; 113/* 114 * Extra information needed: 115 */ 116 uint32_t itd_self; 117 struct ehci_itd *next; 118 struct ehci_itd *prev; 119 struct ehci_itd *obj_next; 120 struct usb_page_cache *page_cache; 121} __aligned(EHCI_ITD_ALIGN); 122 123typedef struct ehci_itd ehci_itd_t; 124 125/* 126 * Split Transaction Isochronous Transfer Descriptor. This descriptor is used 127 * for full speed transfers only. 128 */ 129struct ehci_sitd { 130 volatile uint32_t sitd_next; 131 volatile uint32_t sitd_portaddr; 132#define EHCI_SITD_SET_DIR_OUT (0 << 31) 133#define EHCI_SITD_SET_DIR_IN (1U << 31) 134#define EHCI_SITD_SET_ADDR(x) (x) 135#define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F) 136#define EHCI_SITD_SET_ENDPT(x) ((x) << 8) 137#define EHCI_SITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 138#define EHCI_SITD_GET_DIR(x) ((x) >> 31) 139#define EHCI_SITD_SET_PORT(x) ((x) << 24) 140#define EHCI_SITD_GET_PORT(x) (((x) >> 24) & 0x7F) 141#define EHCI_SITD_SET_HUBA(x) ((x) << 16) 142#define EHCI_SITD_GET_HUBA(x) (((x) >> 16) & 0x7F) 143 volatile uint32_t sitd_mask; 144#define EHCI_SITD_SET_SMASK(x) (x) 145#define EHCI_SITD_SET_CMASK(x) ((x) << 8) 146 volatile uint32_t sitd_status; 147#define EHCI_SITD_COMPLETE_SPLIT (1<<1) 148#define EHCI_SITD_START_SPLIT (0<<1) 149#define EHCI_SITD_MISSED_MICRO_FRAME (1<<2) 150#define EHCI_SITD_XACTERR (1<<3) 151#define EHCI_SITD_BABBLE (1<<4) 152#define EHCI_SITD_DATABUFERR (1<<5) 153#define EHCI_SITD_ERROR (1<<6) 154#define EHCI_SITD_ACTIVE (1<<7) 155#define EHCI_SITD_IOC (1U<<31) 156#define EHCI_SITD_SET_LEN(len) ((len)<<16) 157#define EHCI_SITD_GET_LEN(x) (((x)>>16) & 0x3FF) 158 volatile uint32_t sitd_bp[2]; 159 volatile uint32_t sitd_back; 160 volatile uint32_t sitd_bp_hi[2]; 161/* 162 * Extra information needed: 163 */ 164 uint32_t sitd_self; 165 struct ehci_sitd *next; 166 struct ehci_sitd *prev; 167 struct ehci_sitd *obj_next; 168 struct usb_page_cache *page_cache; 169} __aligned(EHCI_SITD_ALIGN); 170 171typedef struct ehci_sitd ehci_sitd_t; 172 173/* Queue Element Transfer Descriptor */ 174struct ehci_qtd { 175 volatile uint32_t qtd_next; 176 volatile uint32_t qtd_altnext; 177 volatile uint32_t qtd_status; 178#define EHCI_QTD_GET_STATUS(x) (((x) >> 0) & 0xff) 179#define EHCI_QTD_SET_STATUS(x) ((x) << 0) 180#define EHCI_QTD_ACTIVE 0x80 181#define EHCI_QTD_HALTED 0x40 182#define EHCI_QTD_BUFERR 0x20 183#define EHCI_QTD_BABBLE 0x10 184#define EHCI_QTD_XACTERR 0x08 185#define EHCI_QTD_MISSEDMICRO 0x04 186#define EHCI_QTD_SPLITXSTATE 0x02 187#define EHCI_QTD_PINGSTATE 0x01 188#define EHCI_QTD_STATERRS 0x74 189#define EHCI_QTD_GET_PID(x) (((x) >> 8) & 0x3) 190#define EHCI_QTD_SET_PID(x) ((x) << 8) 191#define EHCI_QTD_PID_OUT 0x0 192#define EHCI_QTD_PID_IN 0x1 193#define EHCI_QTD_PID_SETUP 0x2 194#define EHCI_QTD_GET_CERR(x) (((x) >> 10) & 0x3) 195#define EHCI_QTD_SET_CERR(x) ((x) << 10) 196#define EHCI_QTD_GET_C_PAGE(x) (((x) >> 12) & 0x7) 197#define EHCI_QTD_SET_C_PAGE(x) ((x) << 12) 198#define EHCI_QTD_GET_IOC(x) (((x) >> 15) & 0x1) 199#define EHCI_QTD_IOC 0x00008000 200#define EHCI_QTD_GET_BYTES(x) (((x) >> 16) & 0x7fff) 201#define EHCI_QTD_SET_BYTES(x) ((x) << 16) 202#define EHCI_QTD_GET_TOGGLE(x) (((x) >> 31) & 0x1) 203#define EHCI_QTD_SET_TOGGLE(x) ((x) << 31) 204#define EHCI_QTD_TOGGLE_MASK 0x80000000 205#define EHCI_QTD_NBUFFERS 5 206#define EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE) 207 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 208 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 209/* 210 * Extra information needed: 211 */ 212 struct ehci_qtd *alt_next; 213 struct ehci_qtd *obj_next; 214 struct usb_page_cache *page_cache; 215 uint32_t qtd_self; 216 uint16_t len; 217} __aligned(EHCI_QTD_ALIGN); 218 219typedef struct ehci_qtd ehci_qtd_t; 220 221/* Queue Head Sub Structure */ 222struct ehci_qh_sub { 223 volatile uint32_t qtd_next; 224 volatile uint32_t qtd_altnext; 225 volatile uint32_t qtd_status; 226 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 227 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 228} __aligned(4); 229 230/* Queue Head */ 231struct ehci_qh { 232 volatile uint32_t qh_link; 233 volatile uint32_t qh_endp; 234#define EHCI_QH_GET_ADDR(x) (((x) >> 0) & 0x7f) /* endpoint addr */ 235#define EHCI_QH_SET_ADDR(x) (x) 236#define EHCI_QH_ADDRMASK 0x0000007f 237#define EHCI_QH_GET_INACT(x) (((x) >> 7) & 0x01) /* inactivate on next */ 238#define EHCI_QH_INACT 0x00000080 239#define EHCI_QH_GET_ENDPT(x) (((x) >> 8) & 0x0f) /* endpoint no */ 240#define EHCI_QH_SET_ENDPT(x) ((x) << 8) 241#define EHCI_QH_GET_EPS(x) (((x) >> 12) & 0x03) /* endpoint speed */ 242#define EHCI_QH_SET_EPS(x) ((x) << 12) 243#define EHCI_QH_SPEED_FULL 0x0 244#define EHCI_QH_SPEED_LOW 0x1 245#define EHCI_QH_SPEED_HIGH 0x2 246#define EHCI_QH_GET_DTC(x) (((x) >> 14) & 0x01) /* data toggle control */ 247#define EHCI_QH_DTC 0x00004000 248#define EHCI_QH_GET_HRECL(x) (((x) >> 15) & 0x01) /* head of reclamation */ 249#define EHCI_QH_HRECL 0x00008000 250#define EHCI_QH_GET_MPL(x) (((x) >> 16) & 0x7ff) /* max packet len */ 251#define EHCI_QH_SET_MPL(x) ((x) << 16) 252#define EHCI_QH_MPLMASK 0x07ff0000 253#define EHCI_QH_GET_CTL(x) (((x) >> 27) & 0x01) /* control endpoint */ 254#define EHCI_QH_CTL 0x08000000 255#define EHCI_QH_GET_NRL(x) (((x) >> 28) & 0x0f) /* NAK reload */ 256#define EHCI_QH_SET_NRL(x) ((x) << 28) 257 volatile uint32_t qh_endphub; 258#define EHCI_QH_GET_SMASK(x) (((x) >> 0) & 0xff) /* intr sched mask */ 259#define EHCI_QH_SET_SMASK(x) ((x) << 0) 260#define EHCI_QH_GET_CMASK(x) (((x) >> 8) & 0xff) /* split completion mask */ 261#define EHCI_QH_SET_CMASK(x) ((x) << 8) 262#define EHCI_QH_GET_HUBA(x) (((x) >> 16) & 0x7f) /* hub address */ 263#define EHCI_QH_SET_HUBA(x) ((x) << 16) 264#define EHCI_QH_GET_PORT(x) (((x) >> 23) & 0x7f) /* hub port */ 265#define EHCI_QH_SET_PORT(x) ((x) << 23) 266#define EHCI_QH_GET_MULT(x) (((x) >> 30) & 0x03) /* pipe multiplier */ 267#define EHCI_QH_SET_MULT(x) ((x) << 30) 268 volatile uint32_t qh_curqtd; 269 struct ehci_qh_sub qh_qtd; 270/* 271 * Extra information needed: 272 */ 273 struct ehci_qh *next; 274 struct ehci_qh *prev; 275 struct ehci_qh *obj_next; 276 struct usb_page_cache *page_cache; 277 uint32_t qh_self; 278} __aligned(EHCI_QH_ALIGN); 279 280typedef struct ehci_qh ehci_qh_t; 281 282/* Periodic Frame Span Traversal Node */ 283struct ehci_fstn { 284 volatile uint32_t fstn_link; 285 volatile uint32_t fstn_back; 286} __aligned(EHCI_FSTN_ALIGN); 287 288typedef struct ehci_fstn ehci_fstn_t; 289 290struct ehci_hw_softc { 291 struct usb_page_cache pframes_pc; 292 struct usb_page_cache terminate_pc; 293 struct usb_page_cache async_start_pc; 294 struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 295 struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 296 struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 297 298 struct usb_page pframes_pg; 299 struct usb_page terminate_pg; 300 struct usb_page async_start_pg; 301 struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 302 struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 303 struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 304}; 305 306struct ehci_config_desc { 307 struct usb_config_descriptor confd; 308 struct usb_interface_descriptor ifcd; 309 struct usb_endpoint_descriptor endpd; 310} __packed; 311 312union ehci_hub_desc { 313 struct usb_status stat; 314 struct usb_port_status ps; 315 struct usb_hub_descriptor hubd; 316 uint8_t temp[128]; 317}; 318 319typedef struct ehci_softc { 320 struct ehci_hw_softc sc_hw; 321 struct usb_bus sc_bus; /* base device */ 322 struct usb_callout sc_tmo_pcd; 323 struct usb_callout sc_tmo_poll; 324 union ehci_hub_desc sc_hub_desc; 325 326 struct usb_device *sc_devices[EHCI_MAX_DEVICES]; 327 struct resource *sc_io_res; 328 struct resource *sc_irq_res; 329 struct ehci_qh *sc_async_p_last; 330 struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 331 struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 332 struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 333 void *sc_intr_hdl; 334 bus_size_t sc_io_size; 335 bus_space_tag_t sc_io_tag; 336 bus_space_handle_t sc_io_hdl; 337 338 uint32_t sc_terminate_self; /* TD short packet termination pointer */ 339 uint32_t sc_eintrs; 340 341 uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT]; 342 uint16_t sc_id_vendor; /* vendor ID for root hub */ 343 uint16_t sc_flags; /* chip specific flags */ 344#define EHCI_SCFLG_NORESTERM 0x0004 /* don't terminate reset sequence */ 345#define EHCI_SCFLG_BIGEDESC 0x0008 /* big-endian byte order descriptors */ 346#define EHCI_SCFLG_TT 0x0020 /* transaction translator present */ 347#define EHCI_SCFLG_LOSTINTRBUG 0x0040 /* workaround for VIA / ATI chipsets */ 348#define EHCI_SCFLG_IAADBUG 0x0080 /* workaround for nVidia chipsets */ 349#define EHCI_SCFLG_DONTRESET 0x0100 /* don't reset ctrl. in ehci_init() */ 350#define EHCI_SCFLG_DONEINIT 0x1000 /* ehci_init() has been called. */ 351 352 uint8_t sc_offs; /* offset to operational registers */ 353 uint8_t sc_doorbell_disable; /* set on doorbell failure */ 354 uint8_t sc_noport; 355 uint8_t sc_addr; /* device address */ 356 uint8_t sc_conf; /* device configuration */ 357 uint8_t sc_isreset; 358 uint8_t sc_hub_idata[8]; 359 360 char sc_vendor[16]; /* vendor string for root hub */ 361 362 void (*sc_vendor_post_reset)(struct ehci_softc *sc); 363 uint16_t (*sc_vendor_get_port_speed)(struct ehci_softc *sc, 364 uint16_t index); 365 366} ehci_softc_t; 367 368#define EREAD1(sc, a) bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 369#define EREAD2(sc, a) bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 370#define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 371#define EWRITE1(sc, a, x) \ 372 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 373#define EWRITE2(sc, a, x) \ 374 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 375#define EWRITE4(sc, a, x) \ 376 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 377#define EOREAD1(sc, a) \ 378 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 379#define EOREAD2(sc, a) \ 380 bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 381#define EOREAD4(sc, a) \ 382 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 383#define EOWRITE1(sc, a, x) \ 384 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 385#define EOWRITE2(sc, a, x) \ 386 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 387#define EOWRITE4(sc, a, x) \ 388 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 389 390#ifdef USB_EHCI_BIG_ENDIAN_DESC 391/* 392 * Handle byte order conversion between host and ``host controller''. 393 * Typically the latter is little-endian but some controllers require 394 * big-endian in which case we may need to manually swap. 395 */ 396static __inline uint32_t 397htohc32(const struct ehci_softc *sc, const uint32_t v) 398{ 399 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v); 400} 401 402static __inline uint16_t 403htohc16(const struct ehci_softc *sc, const uint16_t v) 404{ 405 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v); 406} 407 408static __inline uint32_t 409hc32toh(const struct ehci_softc *sc, const uint32_t v) 410{ 411 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v); 412} 413 414static __inline uint16_t 415hc16toh(const struct ehci_softc *sc, const uint16_t v) 416{ 417 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v); 418} 419#else 420/* 421 * Normal little-endian only conversion routines. 422 */ 423static __inline uint32_t 424htohc32(const struct ehci_softc *sc, const uint32_t v) 425{ 426 return htole32(v); 427} 428 429static __inline uint16_t 430htohc16(const struct ehci_softc *sc, const uint16_t v) 431{ 432 return htole16(v); 433} 434 435static __inline uint32_t 436hc32toh(const struct ehci_softc *sc, const uint32_t v) 437{ 438 return le32toh(v); 439} 440 441static __inline uint16_t 442hc16toh(const struct ehci_softc *sc, const uint16_t v) 443{ 444 return le16toh(v); 445} 446#endif 447 448usb_bus_mem_cb_t ehci_iterate_hw_softc; 449 450usb_error_t ehci_reset(ehci_softc_t *sc); 451usb_error_t ehci_init(ehci_softc_t *sc); 452void ehci_detach(struct ehci_softc *sc); 453void ehci_interrupt(unsigned int irq, ehci_softc_t *sc); 454uint16_t ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index); 455uint16_t ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index); 456 457#endif /* _EHCI_H_ */ 458