1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _UAPI__SOUND_ASOUND_H 20#define _UAPI__SOUND_ASOUND_H 21#ifdef __linux__ 22#include <linux/types.h> 23#include <asm/byteorder.h> 24#else 25#include <endian.h> 26#include <sys/ioctl.h> 27#endif 28#include <stdlib.h> 29#include <time.h> 30#define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor)) 31#define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff) 32#define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff) 33#define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff) 34#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion))) 35struct snd_aes_iec958 { 36 unsigned char status[24]; 37 unsigned char subcode[147]; 38 unsigned char pad; 39 unsigned char dig_subframe[4]; 40}; 41struct snd_cea_861_aud_if { 42 unsigned char db1_ct_cc; 43 unsigned char db2_sf_ss; 44 unsigned char db3; 45 unsigned char db4_ca; 46 unsigned char db5_dminh_lsv; 47}; 48#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 49enum { 50 SNDRV_HWDEP_IFACE_OPL2 = 0, 51 SNDRV_HWDEP_IFACE_OPL3, 52 SNDRV_HWDEP_IFACE_OPL4, 53 SNDRV_HWDEP_IFACE_SB16CSP, 54 SNDRV_HWDEP_IFACE_EMU10K1, 55 SNDRV_HWDEP_IFACE_YSS225, 56 SNDRV_HWDEP_IFACE_ICS2115, 57 SNDRV_HWDEP_IFACE_SSCAPE, 58 SNDRV_HWDEP_IFACE_VX, 59 SNDRV_HWDEP_IFACE_MIXART, 60 SNDRV_HWDEP_IFACE_USX2Y, 61 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, 62 SNDRV_HWDEP_IFACE_BLUETOOTH, 63 SNDRV_HWDEP_IFACE_USX2Y_PCM, 64 SNDRV_HWDEP_IFACE_PCXHR, 65 SNDRV_HWDEP_IFACE_SB_RC, 66 SNDRV_HWDEP_IFACE_HDA, 67 SNDRV_HWDEP_IFACE_USB_STREAM, 68 SNDRV_HWDEP_IFACE_FW_DICE, 69 SNDRV_HWDEP_IFACE_FW_FIREWORKS, 70 SNDRV_HWDEP_IFACE_FW_BEBOB, 71 SNDRV_HWDEP_IFACE_FW_OXFW, 72 SNDRV_HWDEP_IFACE_FW_DIGI00X, 73 SNDRV_HWDEP_IFACE_FW_TASCAM, 74 SNDRV_HWDEP_IFACE_LINE6, 75 SNDRV_HWDEP_IFACE_FW_MOTU, 76 SNDRV_HWDEP_IFACE_FW_FIREFACE, 77 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE 78}; 79struct snd_hwdep_info { 80 unsigned int device; 81 int card; 82 unsigned char id[64]; 83 unsigned char name[80]; 84 int iface; 85 unsigned char reserved[64]; 86}; 87struct snd_hwdep_dsp_status { 88 unsigned int version; 89 unsigned char id[32]; 90 unsigned int num_dsps; 91 unsigned int dsp_loaded; 92 unsigned int chip_ready; 93 unsigned char reserved[16]; 94}; 95struct snd_hwdep_dsp_image { 96 unsigned int index; 97 unsigned char name[64]; 98 unsigned char __user * image; 99 size_t length; 100 unsigned long driver_data; 101}; 102#define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int) 103#define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info) 104#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status) 105#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image) 106#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15) 107typedef unsigned long snd_pcm_uframes_t; 108typedef signed long snd_pcm_sframes_t; 109enum { 110 SNDRV_PCM_CLASS_GENERIC = 0, 111 SNDRV_PCM_CLASS_MULTI, 112 SNDRV_PCM_CLASS_MODEM, 113 SNDRV_PCM_CLASS_DIGITIZER, 114 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER, 115}; 116enum { 117 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, 118 SNDRV_PCM_SUBCLASS_MULTI_MIX, 119 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX, 120}; 121enum { 122 SNDRV_PCM_STREAM_PLAYBACK = 0, 123 SNDRV_PCM_STREAM_CAPTURE, 124 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, 125}; 126typedef int __bitwise snd_pcm_access_t; 127#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) 128#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) 129#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) 130#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) 131#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) 132#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED 133typedef int __bitwise snd_pcm_format_t; 134#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0) 135#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1) 136#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2) 137#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3) 138#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4) 139#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5) 140#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) 141#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) 142#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) 143#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) 144#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10) 145#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11) 146#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12) 147#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13) 148#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) 149#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) 150#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) 151#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) 152#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) 153#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) 154#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20) 155#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21) 156#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22) 157#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23) 158#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24) 159#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25) 160#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26) 161#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27) 162#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28) 163#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31) 164#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) 165#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) 166#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) 167#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) 168#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) 169#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) 170#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) 171#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) 172#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) 173#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) 174#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) 175#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) 176#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44) 177#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45) 178#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46) 179#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47) 180#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48) 181#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49) 182#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50) 183#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51) 184#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52) 185#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE 186#define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8 187#ifdef SNDRV_LITTLE_ENDIAN 188#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE 189#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE 190#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE 191#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE 192#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE 193#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE 194#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE 195#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE 196#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE 197#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE 198#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE 199#endif 200#ifdef SNDRV_BIG_ENDIAN 201#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE 202#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE 203#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE 204#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE 205#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE 206#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE 207#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE 208#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE 209#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE 210#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE 211#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE 212#endif 213typedef int __bitwise snd_pcm_subformat_t; 214#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0) 215#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD 216#define SNDRV_PCM_INFO_MMAP 0x00000001 217#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 218#define SNDRV_PCM_INFO_DOUBLE 0x00000004 219#define SNDRV_PCM_INFO_BATCH 0x00000010 220#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 221#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 222#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 223#define SNDRV_PCM_INFO_COMPLEX 0x00000400 224#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 225#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 226#define SNDRV_PCM_INFO_RESUME 0x00040000 227#define SNDRV_PCM_INFO_PAUSE 0x00080000 228#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 229#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 230#define SNDRV_PCM_INFO_SYNC_START 0x00400000 231#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 232#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 233#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 234#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 235#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 236#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 237#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 238#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 239#if __BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64) 240#define __SND_STRUCT_TIME64 241#endif 242typedef int __bitwise snd_pcm_state_t; 243#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) 244#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) 245#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) 246#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) 247#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) 248#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) 249#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) 250#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) 251#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) 252#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED 253enum { 254 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000, 255 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000, 256 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000, 257 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000, 258 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000, 259#ifdef __SND_STRUCT_TIME64 260 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW, 261 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW, 262#else 263 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD, 264 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD, 265#endif 266}; 267union snd_pcm_sync_id { 268 unsigned char id[16]; 269 unsigned short id16[8]; 270 unsigned int id32[4]; 271}; 272struct snd_pcm_info { 273 unsigned int device; 274 unsigned int subdevice; 275 int stream; 276 int card; 277 unsigned char id[64]; 278 unsigned char name[80]; 279 unsigned char subname[32]; 280 int dev_class; 281 int dev_subclass; 282 unsigned int subdevices_count; 283 unsigned int subdevices_avail; 284 union snd_pcm_sync_id sync; 285 unsigned char reserved[64]; 286}; 287typedef int snd_pcm_hw_param_t; 288#define SNDRV_PCM_HW_PARAM_ACCESS 0 289#define SNDRV_PCM_HW_PARAM_FORMAT 1 290#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 291#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS 292#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT 293#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 294#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 295#define SNDRV_PCM_HW_PARAM_CHANNELS 10 296#define SNDRV_PCM_HW_PARAM_RATE 11 297#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 298#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 299#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 300#define SNDRV_PCM_HW_PARAM_PERIODS 15 301#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 302#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 303#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 304#define SNDRV_PCM_HW_PARAM_TICK_TIME 19 305#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS 306#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME 307#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0) 308#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1) 309#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2) 310struct snd_interval { 311 unsigned int min, max; 312 unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1; 313}; 314#define SNDRV_MASK_MAX 256 315struct snd_mask { 316 __u32 bits[(SNDRV_MASK_MAX + 31) / 32]; 317}; 318struct snd_pcm_hw_params { 319 unsigned int flags; 320 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1]; 321 struct snd_mask mres[5]; 322 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1]; 323 struct snd_interval ires[9]; 324 unsigned int rmask; 325 unsigned int cmask; 326 unsigned int info; 327 unsigned int msbits; 328 unsigned int rate_num; 329 unsigned int rate_den; 330 snd_pcm_uframes_t fifo_size; 331 unsigned char reserved[64]; 332}; 333enum { 334 SNDRV_PCM_TSTAMP_NONE = 0, 335 SNDRV_PCM_TSTAMP_ENABLE, 336 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE, 337}; 338struct snd_pcm_sw_params { 339 int tstamp_mode; 340 unsigned int period_step; 341 unsigned int sleep_min; 342 snd_pcm_uframes_t avail_min; 343 snd_pcm_uframes_t xfer_align; 344 snd_pcm_uframes_t start_threshold; 345 snd_pcm_uframes_t stop_threshold; 346 snd_pcm_uframes_t silence_threshold; 347 snd_pcm_uframes_t silence_size; 348 snd_pcm_uframes_t boundary; 349 unsigned int proto; 350 unsigned int tstamp_type; 351 unsigned char reserved[56]; 352}; 353struct snd_pcm_channel_info { 354 unsigned int channel; 355 __kernel_off_t offset; 356 unsigned int first; 357 unsigned int step; 358}; 359enum { 360 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0, 361 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, 362 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, 363 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, 364 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, 365 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, 366 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED 367}; 368typedef struct { 369 unsigned char pad[sizeof(time_t) - sizeof(int)]; 370} __time_pad; 371struct snd_pcm_status { 372 snd_pcm_state_t state; 373 __time_pad pad1; 374 struct timespec trigger_tstamp; 375 struct timespec tstamp; 376 snd_pcm_uframes_t appl_ptr; 377 snd_pcm_uframes_t hw_ptr; 378 snd_pcm_sframes_t delay; 379 snd_pcm_uframes_t avail; 380 snd_pcm_uframes_t avail_max; 381 snd_pcm_uframes_t overrange; 382 snd_pcm_state_t suspended_state; 383 __u32 audio_tstamp_data; 384 struct timespec audio_tstamp; 385 struct timespec driver_tstamp; 386 __u32 audio_tstamp_accuracy; 387 unsigned char reserved[52 - 2 * sizeof(struct timespec)]; 388}; 389#ifdef __SND_STRUCT_TIME64 390#define __snd_pcm_mmap_status64 snd_pcm_mmap_status 391#define __snd_pcm_mmap_control64 snd_pcm_mmap_control 392#define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr 393#define __snd_timespec64 timespec 394struct __snd_timespec { 395 __s32 tv_sec; 396 __s32 tv_nsec; 397}; 398#else 399#define __snd_pcm_mmap_status snd_pcm_mmap_status 400#define __snd_pcm_mmap_control snd_pcm_mmap_control 401#define __snd_pcm_sync_ptr snd_pcm_sync_ptr 402#define __snd_timespec timespec 403struct __snd_timespec64 { 404 __s64 tv_sec; 405 __s64 tv_nsec; 406}; 407#endif 408struct __snd_pcm_mmap_status { 409 snd_pcm_state_t state; 410 int pad1; 411 snd_pcm_uframes_t hw_ptr; 412 struct __snd_timespec tstamp; 413 snd_pcm_state_t suspended_state; 414 struct __snd_timespec audio_tstamp; 415}; 416struct __snd_pcm_mmap_control { 417 snd_pcm_uframes_t appl_ptr; 418 snd_pcm_uframes_t avail_min; 419}; 420#define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0) 421#define SNDRV_PCM_SYNC_PTR_APPL (1 << 1) 422#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2) 423struct __snd_pcm_sync_ptr { 424 unsigned int flags; 425 union { 426 struct __snd_pcm_mmap_status status; 427 unsigned char reserved[64]; 428 } s; 429 union { 430 struct __snd_pcm_mmap_control control; 431 unsigned char reserved[64]; 432 } c; 433}; 434#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) 435typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 436typedef char __pad_after_uframe[0]; 437#endif 438#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) 439typedef char __pad_before_uframe[0]; 440typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 441#endif 442struct __snd_pcm_mmap_status64 { 443 snd_pcm_state_t state; 444 __u32 pad1; 445 __pad_before_uframe __pad1; 446 snd_pcm_uframes_t hw_ptr; 447 __pad_after_uframe __pad2; 448 struct __snd_timespec64 tstamp; 449 snd_pcm_state_t suspended_state; 450 __u32 pad3; 451 struct __snd_timespec64 audio_tstamp; 452}; 453struct __snd_pcm_mmap_control64 { 454 __pad_before_uframe __pad1; 455 snd_pcm_uframes_t appl_ptr; 456 __pad_before_uframe __pad2; 457 __pad_before_uframe __pad3; 458 snd_pcm_uframes_t avail_min; 459 __pad_after_uframe __pad4; 460}; 461struct __snd_pcm_sync_ptr64 { 462 __u32 flags; 463 __u32 pad1; 464 union { 465 struct __snd_pcm_mmap_status64 status; 466 unsigned char reserved[64]; 467 } s; 468 union { 469 struct __snd_pcm_mmap_control64 control; 470 unsigned char reserved[64]; 471 } c; 472}; 473struct snd_xferi { 474 snd_pcm_sframes_t result; 475 void __user * buf; 476 snd_pcm_uframes_t frames; 477}; 478struct snd_xfern { 479 snd_pcm_sframes_t result; 480 void __user * __user * bufs; 481 snd_pcm_uframes_t frames; 482}; 483enum { 484 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, 485 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, 486 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 487 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 488}; 489enum { 490 SNDRV_CHMAP_UNKNOWN = 0, 491 SNDRV_CHMAP_NA, 492 SNDRV_CHMAP_MONO, 493 SNDRV_CHMAP_FL, 494 SNDRV_CHMAP_FR, 495 SNDRV_CHMAP_RL, 496 SNDRV_CHMAP_RR, 497 SNDRV_CHMAP_FC, 498 SNDRV_CHMAP_LFE, 499 SNDRV_CHMAP_SL, 500 SNDRV_CHMAP_SR, 501 SNDRV_CHMAP_RC, 502 SNDRV_CHMAP_FLC, 503 SNDRV_CHMAP_FRC, 504 SNDRV_CHMAP_RLC, 505 SNDRV_CHMAP_RRC, 506 SNDRV_CHMAP_FLW, 507 SNDRV_CHMAP_FRW, 508 SNDRV_CHMAP_FLH, 509 SNDRV_CHMAP_FCH, 510 SNDRV_CHMAP_FRH, 511 SNDRV_CHMAP_TC, 512 SNDRV_CHMAP_TFL, 513 SNDRV_CHMAP_TFR, 514 SNDRV_CHMAP_TFC, 515 SNDRV_CHMAP_TRL, 516 SNDRV_CHMAP_TRR, 517 SNDRV_CHMAP_TRC, 518 SNDRV_CHMAP_TFLC, 519 SNDRV_CHMAP_TFRC, 520 SNDRV_CHMAP_TSL, 521 SNDRV_CHMAP_TSR, 522 SNDRV_CHMAP_LLFE, 523 SNDRV_CHMAP_RLFE, 524 SNDRV_CHMAP_BC, 525 SNDRV_CHMAP_BLC, 526 SNDRV_CHMAP_BRC, 527 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC, 528}; 529#define SNDRV_CHMAP_POSITION_MASK 0xffff 530#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16) 531#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16) 532#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int) 533#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info) 534#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int) 535#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int) 536#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int) 537#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params) 538#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params) 539#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12) 540#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params) 541#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status) 542#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t) 543#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22) 544#define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr) 545#define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64) 546#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr) 547#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status) 548#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info) 549#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40) 550#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41) 551#define SNDRV_PCM_IOCTL_START _IO('A', 0x42) 552#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43) 553#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44) 554#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int) 555#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t) 556#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47) 557#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48) 558#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t) 559#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi) 560#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi) 561#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern) 562#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern) 563#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int) 564#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61) 565#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 1) 566enum { 567 SNDRV_RAWMIDI_STREAM_OUTPUT = 0, 568 SNDRV_RAWMIDI_STREAM_INPUT, 569 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT, 570}; 571#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001 572#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002 573#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004 574struct snd_rawmidi_info { 575 unsigned int device; 576 unsigned int subdevice; 577 int stream; 578 int card; 579 unsigned int flags; 580 unsigned char id[64]; 581 unsigned char name[80]; 582 unsigned char subname[32]; 583 unsigned int subdevices_count; 584 unsigned int subdevices_avail; 585 unsigned char reserved[64]; 586}; 587struct snd_rawmidi_params { 588 int stream; 589 size_t buffer_size; 590 size_t avail_min; 591 unsigned int no_active_sensing : 1; 592 unsigned char reserved[16]; 593}; 594struct snd_rawmidi_status { 595 int stream; 596 __time_pad pad1; 597 struct timespec tstamp; 598 size_t avail; 599 size_t xruns; 600 unsigned char reserved[16]; 601}; 602#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int) 603#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info) 604#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params) 605#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status) 606#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int) 607#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int) 608#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7) 609enum { 610 SNDRV_TIMER_CLASS_NONE = - 1, 611 SNDRV_TIMER_CLASS_SLAVE = 0, 612 SNDRV_TIMER_CLASS_GLOBAL, 613 SNDRV_TIMER_CLASS_CARD, 614 SNDRV_TIMER_CLASS_PCM, 615 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM, 616}; 617enum { 618 SNDRV_TIMER_SCLASS_NONE = 0, 619 SNDRV_TIMER_SCLASS_APPLICATION, 620 SNDRV_TIMER_SCLASS_SEQUENCER, 621 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 622 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 623}; 624#define SNDRV_TIMER_GLOBAL_SYSTEM 0 625#define SNDRV_TIMER_GLOBAL_RTC 1 626#define SNDRV_TIMER_GLOBAL_HPET 2 627#define SNDRV_TIMER_GLOBAL_HRTIMER 3 628#define SNDRV_TIMER_FLG_SLAVE (1 << 0) 629struct snd_timer_id { 630 int dev_class; 631 int dev_sclass; 632 int card; 633 int device; 634 int subdevice; 635}; 636struct snd_timer_ginfo { 637 struct snd_timer_id tid; 638 unsigned int flags; 639 int card; 640 unsigned char id[64]; 641 unsigned char name[80]; 642 unsigned long reserved0; 643 unsigned long resolution; 644 unsigned long resolution_min; 645 unsigned long resolution_max; 646 unsigned int clients; 647 unsigned char reserved[32]; 648}; 649struct snd_timer_gparams { 650 struct snd_timer_id tid; 651 unsigned long period_num; 652 unsigned long period_den; 653 unsigned char reserved[32]; 654}; 655struct snd_timer_gstatus { 656 struct snd_timer_id tid; 657 unsigned long resolution; 658 unsigned long resolution_num; 659 unsigned long resolution_den; 660 unsigned char reserved[32]; 661}; 662struct snd_timer_select { 663 struct snd_timer_id id; 664 unsigned char reserved[32]; 665}; 666struct snd_timer_info { 667 unsigned int flags; 668 int card; 669 unsigned char id[64]; 670 unsigned char name[80]; 671 unsigned long reserved0; 672 unsigned long resolution; 673 unsigned char reserved[64]; 674}; 675#define SNDRV_TIMER_PSFLG_AUTO (1 << 0) 676#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1) 677#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2) 678struct snd_timer_params { 679 unsigned int flags; 680 unsigned int ticks; 681 unsigned int queue_size; 682 unsigned int reserved0; 683 unsigned int filter; 684 unsigned char reserved[60]; 685}; 686struct snd_timer_status { 687 struct timespec tstamp; 688 unsigned int resolution; 689 unsigned int lost; 690 unsigned int overrun; 691 unsigned int queue; 692 unsigned char reserved[64]; 693}; 694#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int) 695#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id) 696#define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int) 697#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo) 698#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams) 699#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus) 700#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select) 701#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info) 702#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params) 703#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status) 704#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0) 705#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1) 706#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2) 707#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3) 708#define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int) 709#if __BITS_PER_LONG == 64 710#define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD 711#else 712#define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? SNDRV_TIMER_IOCTL_TREAD_OLD : SNDRV_TIMER_IOCTL_TREAD64) 713#endif 714struct snd_timer_read { 715 unsigned int resolution; 716 unsigned int ticks; 717}; 718enum { 719 SNDRV_TIMER_EVENT_RESOLUTION = 0, 720 SNDRV_TIMER_EVENT_TICK, 721 SNDRV_TIMER_EVENT_START, 722 SNDRV_TIMER_EVENT_STOP, 723 SNDRV_TIMER_EVENT_CONTINUE, 724 SNDRV_TIMER_EVENT_PAUSE, 725 SNDRV_TIMER_EVENT_EARLY, 726 SNDRV_TIMER_EVENT_SUSPEND, 727 SNDRV_TIMER_EVENT_RESUME, 728 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10, 729 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10, 730 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10, 731 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10, 732 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10, 733 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10, 734}; 735struct snd_timer_tread { 736 int event; 737 __time_pad pad1; 738 struct timespec tstamp; 739 unsigned int val; 740 __time_pad pad2; 741}; 742#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8) 743struct snd_ctl_card_info { 744 int card; 745 int pad; 746 unsigned char id[16]; 747 unsigned char driver[16]; 748 unsigned char name[32]; 749 unsigned char longname[80]; 750 unsigned char reserved_[16]; 751 unsigned char mixername[80]; 752 unsigned char components[128]; 753}; 754typedef int __bitwise snd_ctl_elem_type_t; 755#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) 756#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) 757#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) 758#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) 759#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) 760#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) 761#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) 762#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 763typedef int __bitwise snd_ctl_elem_iface_t; 764#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) 765#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) 766#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) 767#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) 768#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) 769#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) 770#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) 771#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER 772#define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0) 773#define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1) 774#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE) 775#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2) 776#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4) 777#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5) 778#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) 779#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6) 780#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8) 781#define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9) 782#define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10) 783#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28) 784#define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29) 785#define SNDRV_CTL_POWER_D0 0x0000 786#define SNDRV_CTL_POWER_D1 0x0100 787#define SNDRV_CTL_POWER_D2 0x0200 788#define SNDRV_CTL_POWER_D3 0x0300 789#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000) 790#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001) 791#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44 792struct snd_ctl_elem_id { 793 unsigned int numid; 794 snd_ctl_elem_iface_t iface; 795 unsigned int device; 796 unsigned int subdevice; 797 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 798 unsigned int index; 799}; 800struct snd_ctl_elem_list { 801 unsigned int offset; 802 unsigned int space; 803 unsigned int used; 804 unsigned int count; 805 struct snd_ctl_elem_id __user * pids; 806 unsigned char reserved[50]; 807}; 808struct snd_ctl_elem_info { 809 struct snd_ctl_elem_id id; 810 snd_ctl_elem_type_t type; 811 unsigned int access; 812 unsigned int count; 813 __kernel_pid_t owner; 814 union { 815 struct { 816 long min; 817 long max; 818 long step; 819 } integer; 820 struct { 821 long long min; 822 long long max; 823 long long step; 824 } integer64; 825 struct { 826 unsigned int items; 827 unsigned int item; 828 char name[64]; 829 __u64 names_ptr; 830 unsigned int names_length; 831 } enumerated; 832 unsigned char reserved[128]; 833 } value; 834 unsigned char reserved[64]; 835}; 836struct snd_ctl_elem_value { 837 struct snd_ctl_elem_id id; 838 unsigned int indirect : 1; 839 union { 840 union { 841 long value[128]; 842 long * value_ptr; 843 } integer; 844 union { 845 long long value[64]; 846 long long * value_ptr; 847 } integer64; 848 union { 849 unsigned int item[128]; 850 unsigned int * item_ptr; 851 } enumerated; 852 union { 853 unsigned char data[512]; 854 unsigned char * data_ptr; 855 } bytes; 856 struct snd_aes_iec958 iec958; 857 } value; 858 unsigned char reserved[128]; 859}; 860struct snd_ctl_tlv { 861 unsigned int numid; 862 unsigned int length; 863 unsigned int tlv[0]; 864}; 865#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) 866#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) 867#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list) 868#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info) 869#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value) 870#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value) 871#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id) 872#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id) 873#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int) 874#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info) 875#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info) 876#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id) 877#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv) 878#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv) 879#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv) 880#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int) 881#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info) 882#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int) 883#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info) 884#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int) 885#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int) 886#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info) 887#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) 888#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) 889#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) 890enum sndrv_ctl_event_type { 891 SNDRV_CTL_EVENT_ELEM = 0, 892 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM, 893}; 894#define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0) 895#define SNDRV_CTL_EVENT_MASK_INFO (1 << 1) 896#define SNDRV_CTL_EVENT_MASK_ADD (1 << 2) 897#define SNDRV_CTL_EVENT_MASK_TLV (1 << 3) 898#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) 899struct snd_ctl_event { 900 int type; 901 union { 902 struct { 903 unsigned int mask; 904 struct snd_ctl_elem_id id; 905 } elem; 906 unsigned char data8[60]; 907 } data; 908}; 909#define SNDRV_CTL_NAME_NONE "" 910#define SNDRV_CTL_NAME_PLAYBACK "Playback " 911#define SNDRV_CTL_NAME_CAPTURE "Capture " 912#define SNDRV_CTL_NAME_IEC958_NONE "" 913#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch" 914#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume" 915#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default" 916#define SNDRV_CTL_NAME_IEC958_MASK "Mask" 917#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask" 918#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask" 919#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream" 920#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what 921#endif 922