1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __VMW_PVRDMA_ABI_H__
20#define __VMW_PVRDMA_ABI_H__
21#include <linux/types.h>
22#define PVRDMA_UVERBS_ABI_VERSION 3
23#define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF
24#define PVRDMA_UAR_QP_OFFSET 0
25#define PVRDMA_UAR_QP_SEND (1 << 30)
26#define PVRDMA_UAR_QP_RECV (1 << 31)
27#define PVRDMA_UAR_CQ_OFFSET 4
28#define PVRDMA_UAR_CQ_ARM_SOL (1 << 29)
29#define PVRDMA_UAR_CQ_ARM (1 << 30)
30#define PVRDMA_UAR_CQ_POLL (1 << 31)
31#define PVRDMA_UAR_SRQ_OFFSET 8
32#define PVRDMA_UAR_SRQ_RECV (1 << 30)
33enum pvrdma_wr_opcode {
34  PVRDMA_WR_RDMA_WRITE,
35  PVRDMA_WR_RDMA_WRITE_WITH_IMM,
36  PVRDMA_WR_SEND,
37  PVRDMA_WR_SEND_WITH_IMM,
38  PVRDMA_WR_RDMA_READ,
39  PVRDMA_WR_ATOMIC_CMP_AND_SWP,
40  PVRDMA_WR_ATOMIC_FETCH_AND_ADD,
41  PVRDMA_WR_LSO,
42  PVRDMA_WR_SEND_WITH_INV,
43  PVRDMA_WR_RDMA_READ_WITH_INV,
44  PVRDMA_WR_LOCAL_INV,
45  PVRDMA_WR_FAST_REG_MR,
46  PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,
47  PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
48  PVRDMA_WR_BIND_MW,
49  PVRDMA_WR_REG_SIG_MR,
50  PVRDMA_WR_ERROR,
51};
52enum pvrdma_wc_status {
53  PVRDMA_WC_SUCCESS,
54  PVRDMA_WC_LOC_LEN_ERR,
55  PVRDMA_WC_LOC_QP_OP_ERR,
56  PVRDMA_WC_LOC_EEC_OP_ERR,
57  PVRDMA_WC_LOC_PROT_ERR,
58  PVRDMA_WC_WR_FLUSH_ERR,
59  PVRDMA_WC_MW_BIND_ERR,
60  PVRDMA_WC_BAD_RESP_ERR,
61  PVRDMA_WC_LOC_ACCESS_ERR,
62  PVRDMA_WC_REM_INV_REQ_ERR,
63  PVRDMA_WC_REM_ACCESS_ERR,
64  PVRDMA_WC_REM_OP_ERR,
65  PVRDMA_WC_RETRY_EXC_ERR,
66  PVRDMA_WC_RNR_RETRY_EXC_ERR,
67  PVRDMA_WC_LOC_RDD_VIOL_ERR,
68  PVRDMA_WC_REM_INV_RD_REQ_ERR,
69  PVRDMA_WC_REM_ABORT_ERR,
70  PVRDMA_WC_INV_EECN_ERR,
71  PVRDMA_WC_INV_EEC_STATE_ERR,
72  PVRDMA_WC_FATAL_ERR,
73  PVRDMA_WC_RESP_TIMEOUT_ERR,
74  PVRDMA_WC_GENERAL_ERR,
75};
76enum pvrdma_wc_opcode {
77  PVRDMA_WC_SEND,
78  PVRDMA_WC_RDMA_WRITE,
79  PVRDMA_WC_RDMA_READ,
80  PVRDMA_WC_COMP_SWAP,
81  PVRDMA_WC_FETCH_ADD,
82  PVRDMA_WC_BIND_MW,
83  PVRDMA_WC_LSO,
84  PVRDMA_WC_LOCAL_INV,
85  PVRDMA_WC_FAST_REG_MR,
86  PVRDMA_WC_MASKED_COMP_SWAP,
87  PVRDMA_WC_MASKED_FETCH_ADD,
88  PVRDMA_WC_RECV = 1 << 7,
89  PVRDMA_WC_RECV_RDMA_WITH_IMM,
90};
91enum pvrdma_wc_flags {
92  PVRDMA_WC_GRH = 1 << 0,
93  PVRDMA_WC_WITH_IMM = 1 << 1,
94  PVRDMA_WC_WITH_INVALIDATE = 1 << 2,
95  PVRDMA_WC_IP_CSUM_OK = 1 << 3,
96  PVRDMA_WC_WITH_SMAC = 1 << 4,
97  PVRDMA_WC_WITH_VLAN = 1 << 5,
98  PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6,
99  PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_NETWORK_HDR_TYPE,
100};
101struct pvrdma_alloc_ucontext_resp {
102  __u32 qp_tab_size;
103  __u32 reserved;
104};
105struct pvrdma_alloc_pd_resp {
106  __u32 pdn;
107  __u32 reserved;
108};
109struct pvrdma_create_cq {
110  __aligned_u64 buf_addr;
111  __u32 buf_size;
112  __u32 reserved;
113};
114struct pvrdma_create_cq_resp {
115  __u32 cqn;
116  __u32 reserved;
117};
118struct pvrdma_resize_cq {
119  __aligned_u64 buf_addr;
120  __u32 buf_size;
121  __u32 reserved;
122};
123struct pvrdma_create_srq {
124  __aligned_u64 buf_addr;
125  __u32 buf_size;
126  __u32 reserved;
127};
128struct pvrdma_create_srq_resp {
129  __u32 srqn;
130  __u32 reserved;
131};
132struct pvrdma_create_qp {
133  __aligned_u64 rbuf_addr;
134  __aligned_u64 sbuf_addr;
135  __u32 rbuf_size;
136  __u32 sbuf_size;
137  __aligned_u64 qp_addr;
138};
139struct pvrdma_create_qp_resp {
140  __u32 qpn;
141  __u32 qp_handle;
142};
143struct pvrdma_ex_cmp_swap {
144  __aligned_u64 swap_val;
145  __aligned_u64 compare_val;
146  __aligned_u64 swap_mask;
147  __aligned_u64 compare_mask;
148};
149struct pvrdma_ex_fetch_add {
150  __aligned_u64 add_val;
151  __aligned_u64 field_boundary;
152};
153struct pvrdma_av {
154  __u32 port_pd;
155  __u32 sl_tclass_flowlabel;
156  __u8 dgid[16];
157  __u8 src_path_bits;
158  __u8 gid_index;
159  __u8 stat_rate;
160  __u8 hop_limit;
161  __u8 dmac[6];
162  __u8 reserved[6];
163};
164struct pvrdma_sge {
165  __aligned_u64 addr;
166  __u32 length;
167  __u32 lkey;
168};
169struct pvrdma_rq_wqe_hdr {
170  __aligned_u64 wr_id;
171  __u32 num_sge;
172  __u32 total_len;
173};
174struct pvrdma_sq_wqe_hdr {
175  __aligned_u64 wr_id;
176  __u32 num_sge;
177  __u32 total_len;
178  __u32 opcode;
179  __u32 send_flags;
180  union {
181    __be32 imm_data;
182    __u32 invalidate_rkey;
183  } ex;
184  __u32 reserved;
185  union {
186    struct {
187      __aligned_u64 remote_addr;
188      __u32 rkey;
189      __u8 reserved[4];
190    } rdma;
191    struct {
192      __aligned_u64 remote_addr;
193      __aligned_u64 compare_add;
194      __aligned_u64 swap;
195      __u32 rkey;
196      __u32 reserved;
197    } atomic;
198    struct {
199      __aligned_u64 remote_addr;
200      __u32 log_arg_sz;
201      __u32 rkey;
202      union {
203        struct pvrdma_ex_cmp_swap cmp_swap;
204        struct pvrdma_ex_fetch_add fetch_add;
205      } wr_data;
206    } masked_atomics;
207    struct {
208      __aligned_u64 iova_start;
209      __aligned_u64 pl_pdir_dma;
210      __u32 page_shift;
211      __u32 page_list_len;
212      __u32 length;
213      __u32 access_flags;
214      __u32 rkey;
215      __u32 reserved;
216    } fast_reg;
217    struct {
218      __u32 remote_qpn;
219      __u32 remote_qkey;
220      struct pvrdma_av av;
221    } ud;
222  } wr;
223};
224struct pvrdma_cqe {
225  __aligned_u64 wr_id;
226  __aligned_u64 qp;
227  __u32 opcode;
228  __u32 status;
229  __u32 byte_len;
230  __be32 imm_data;
231  __u32 src_qp;
232  __u32 wc_flags;
233  __u32 vendor_err;
234  __u16 pkey_index;
235  __u16 slid;
236  __u8 sl;
237  __u8 dlid_path_bits;
238  __u8 port_num;
239  __u8 smac[6];
240  __u8 network_hdr_type;
241  __u8 reserved2[6];
242};
243#endif
244