1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __BNXT_RE_UVERBS_ABI_H__
20#define __BNXT_RE_UVERBS_ABI_H__
21#include <linux/types.h>
22#define BNXT_RE_ABI_VERSION 1
23#define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT 0x00
24#define BNXT_RE_CHIP_ID0_CHIP_REV_SFT 0x10
25#define BNXT_RE_CHIP_ID0_CHIP_MET_SFT 0x18
26enum {
27  BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL
28};
29struct bnxt_re_uctx_resp {
30  __u32 dev_id;
31  __u32 max_qp;
32  __u32 pg_size;
33  __u32 cqe_sz;
34  __u32 max_cqd;
35  __u32 rsvd;
36  __aligned_u64 comp_mask;
37  __u32 chip_id0;
38  __u32 chip_id1;
39};
40struct bnxt_re_pd_resp {
41  __u32 pdid;
42  __u32 dpi;
43  __u64 dbr;
44} __attribute__((packed, aligned(4)));
45struct bnxt_re_cq_req {
46  __aligned_u64 cq_va;
47  __aligned_u64 cq_handle;
48};
49struct bnxt_re_cq_resp {
50  __u32 cqid;
51  __u32 tail;
52  __u32 phase;
53  __u32 rsvd;
54};
55struct bnxt_re_qp_req {
56  __aligned_u64 qpsva;
57  __aligned_u64 qprva;
58  __aligned_u64 qp_handle;
59};
60struct bnxt_re_qp_resp {
61  __u32 qpid;
62  __u32 rsvd;
63};
64struct bnxt_re_srq_req {
65  __aligned_u64 srqva;
66  __aligned_u64 srq_handle;
67};
68struct bnxt_re_srq_resp {
69  __u32 srqid;
70};
71enum bnxt_re_shpg_offt {
72  BNXT_RE_BEG_RESV_OFFT = 0x00,
73  BNXT_RE_AVID_OFFT = 0x10,
74  BNXT_RE_AVID_SIZE = 0x04,
75  BNXT_RE_END_RESV_OFFT = 0xFF0
76};
77#endif
78