1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef VIRTGPU_DRM_H
20#define VIRTGPU_DRM_H
21#include "drm.h"
22#ifdef __cplusplus
23extern "C" {
24#endif
25#define DRM_VIRTGPU_MAP 0x01
26#define DRM_VIRTGPU_EXECBUFFER 0x02
27#define DRM_VIRTGPU_GETPARAM 0x03
28#define DRM_VIRTGPU_RESOURCE_CREATE 0x04
29#define DRM_VIRTGPU_RESOURCE_INFO 0x05
30#define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x06
31#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
32#define DRM_VIRTGPU_WAIT 0x08
33#define DRM_VIRTGPU_GET_CAPS 0x09
34#define VIRTGPU_EXECBUF_FENCE_FD_IN 0x01
35#define VIRTGPU_EXECBUF_FENCE_FD_OUT 0x02
36#define VIRTGPU_EXECBUF_FLAGS (VIRTGPU_EXECBUF_FENCE_FD_IN | VIRTGPU_EXECBUF_FENCE_FD_OUT | 0)
37struct drm_virtgpu_map {
38  __u64 offset;
39  __u32 handle;
40  __u32 pad;
41};
42struct drm_virtgpu_execbuffer {
43  __u32 flags;
44  __u32 size;
45  __u64 command;
46  __u64 bo_handles;
47  __u32 num_bo_handles;
48  __s32 fence_fd;
49};
50#define VIRTGPU_PARAM_3D_FEATURES 1
51#define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2
52struct drm_virtgpu_getparam {
53  __u64 param;
54  __u64 value;
55};
56struct drm_virtgpu_resource_create {
57  __u32 target;
58  __u32 format;
59  __u32 bind;
60  __u32 width;
61  __u32 height;
62  __u32 depth;
63  __u32 array_size;
64  __u32 last_level;
65  __u32 nr_samples;
66  __u32 flags;
67  __u32 bo_handle;
68  __u32 res_handle;
69  __u32 size;
70  __u32 stride;
71};
72struct drm_virtgpu_resource_info {
73  __u32 bo_handle;
74  __u32 res_handle;
75  __u32 size;
76  __u32 stride;
77};
78struct drm_virtgpu_3d_box {
79  __u32 x;
80  __u32 y;
81  __u32 z;
82  __u32 w;
83  __u32 h;
84  __u32 d;
85};
86struct drm_virtgpu_3d_transfer_to_host {
87  __u32 bo_handle;
88  struct drm_virtgpu_3d_box box;
89  __u32 level;
90  __u32 offset;
91};
92struct drm_virtgpu_3d_transfer_from_host {
93  __u32 bo_handle;
94  struct drm_virtgpu_3d_box box;
95  __u32 level;
96  __u32 offset;
97};
98#define VIRTGPU_WAIT_NOWAIT 1
99struct drm_virtgpu_3d_wait {
100  __u32 handle;
101  __u32 flags;
102};
103struct drm_virtgpu_get_caps {
104  __u32 cap_set_id;
105  __u32 cap_set_ver;
106  __u64 addr;
107  __u32 size;
108  __u32 pad;
109};
110#define DRM_IOCTL_VIRTGPU_MAP DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
111#define DRM_IOCTL_VIRTGPU_EXECBUFFER DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER, struct drm_virtgpu_execbuffer)
112#define DRM_IOCTL_VIRTGPU_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GETPARAM, struct drm_virtgpu_getparam)
113#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE, struct drm_virtgpu_resource_create)
114#define DRM_IOCTL_VIRTGPU_RESOURCE_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_INFO, struct drm_virtgpu_resource_info)
115#define DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_FROM_HOST, struct drm_virtgpu_3d_transfer_from_host)
116#define DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_TO_HOST, struct drm_virtgpu_3d_transfer_to_host)
117#define DRM_IOCTL_VIRTGPU_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_WAIT, struct drm_virtgpu_3d_wait)
118#define DRM_IOCTL_VIRTGPU_GET_CAPS DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, struct drm_virtgpu_get_caps)
119#ifdef __cplusplus
120}
121#endif
122#endif
123