1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _I810_DRM_H_
20#define _I810_DRM_H_
21#include "drm.h"
22#ifdef __cplusplus
23extern "C" {
24#endif
25#ifndef _I810_DEFINES_
26#define _I810_DEFINES_
27#define I810_DMA_BUF_ORDER 12
28#define I810_DMA_BUF_SZ (1 << I810_DMA_BUF_ORDER)
29#define I810_DMA_BUF_NR 256
30#define I810_NR_SAREA_CLIPRECTS 8
31#define I810_NR_TEX_REGIONS 64
32#define I810_LOG_MIN_TEX_REGION_SIZE 16
33#endif
34#define I810_UPLOAD_TEX0IMAGE 0x1
35#define I810_UPLOAD_TEX1IMAGE 0x2
36#define I810_UPLOAD_CTX 0x4
37#define I810_UPLOAD_BUFFERS 0x8
38#define I810_UPLOAD_TEX0 0x10
39#define I810_UPLOAD_TEX1 0x20
40#define I810_UPLOAD_CLIPRECTS 0x40
41#define I810_DESTREG_DI0 0
42#define I810_DESTREG_DI1 1
43#define I810_DESTREG_DV0 2
44#define I810_DESTREG_DV1 3
45#define I810_DESTREG_DR0 4
46#define I810_DESTREG_DR1 5
47#define I810_DESTREG_DR2 6
48#define I810_DESTREG_DR3 7
49#define I810_DESTREG_DR4 8
50#define I810_DEST_SETUP_SIZE 10
51#define I810_CTXREG_CF0 0
52#define I810_CTXREG_CF1 1
53#define I810_CTXREG_ST0 2
54#define I810_CTXREG_ST1 3
55#define I810_CTXREG_VF 4
56#define I810_CTXREG_MT 5
57#define I810_CTXREG_MC0 6
58#define I810_CTXREG_MC1 7
59#define I810_CTXREG_MC2 8
60#define I810_CTXREG_MA0 9
61#define I810_CTXREG_MA1 10
62#define I810_CTXREG_MA2 11
63#define I810_CTXREG_SDM 12
64#define I810_CTXREG_FOG 13
65#define I810_CTXREG_B1 14
66#define I810_CTXREG_B2 15
67#define I810_CTXREG_LCS 16
68#define I810_CTXREG_PV 17
69#define I810_CTXREG_ZA 18
70#define I810_CTXREG_AA 19
71#define I810_CTX_SETUP_SIZE 20
72#define I810_TEXREG_MI0 0
73#define I810_TEXREG_MI1 1
74#define I810_TEXREG_MI2 2
75#define I810_TEXREG_MI3 3
76#define I810_TEXREG_MF 4
77#define I810_TEXREG_MLC 5
78#define I810_TEXREG_MLL 6
79#define I810_TEXREG_MCS 7
80#define I810_TEX_SETUP_SIZE 8
81#define I810_FRONT 0x1
82#define I810_BACK 0x2
83#define I810_DEPTH 0x4
84typedef enum _drm_i810_init_func {
85  I810_INIT_DMA = 0x01,
86  I810_CLEANUP_DMA = 0x02,
87  I810_INIT_DMA_1_4 = 0x03
88} drm_i810_init_func_t;
89typedef struct _drm_i810_init {
90  drm_i810_init_func_t func;
91  unsigned int mmio_offset;
92  unsigned int buffers_offset;
93  int sarea_priv_offset;
94  unsigned int ring_start;
95  unsigned int ring_end;
96  unsigned int ring_size;
97  unsigned int front_offset;
98  unsigned int back_offset;
99  unsigned int depth_offset;
100  unsigned int overlay_offset;
101  unsigned int overlay_physical;
102  unsigned int w;
103  unsigned int h;
104  unsigned int pitch;
105  unsigned int pitch_bits;
106} drm_i810_init_t;
107typedef struct _drm_i810_pre12_init {
108  drm_i810_init_func_t func;
109  unsigned int mmio_offset;
110  unsigned int buffers_offset;
111  int sarea_priv_offset;
112  unsigned int ring_start;
113  unsigned int ring_end;
114  unsigned int ring_size;
115  unsigned int front_offset;
116  unsigned int back_offset;
117  unsigned int depth_offset;
118  unsigned int w;
119  unsigned int h;
120  unsigned int pitch;
121  unsigned int pitch_bits;
122} drm_i810_pre12_init_t;
123typedef struct _drm_i810_tex_region {
124  unsigned char next, prev;
125  unsigned char in_use;
126  int age;
127} drm_i810_tex_region_t;
128typedef struct _drm_i810_sarea {
129  unsigned int ContextState[I810_CTX_SETUP_SIZE];
130  unsigned int BufferState[I810_DEST_SETUP_SIZE];
131  unsigned int TexState[2][I810_TEX_SETUP_SIZE];
132  unsigned int dirty;
133  unsigned int nbox;
134  struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
135  drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
136  int texAge;
137  int last_enqueue;
138  int last_dispatch;
139  int last_quiescent;
140  int ctxOwner;
141  int vertex_prim;
142  int pf_enabled;
143  int pf_active;
144  int pf_current_page;
145} drm_i810_sarea_t;
146#define DRM_I810_INIT 0x00
147#define DRM_I810_VERTEX 0x01
148#define DRM_I810_CLEAR 0x02
149#define DRM_I810_FLUSH 0x03
150#define DRM_I810_GETAGE 0x04
151#define DRM_I810_GETBUF 0x05
152#define DRM_I810_SWAP 0x06
153#define DRM_I810_COPY 0x07
154#define DRM_I810_DOCOPY 0x08
155#define DRM_I810_OV0INFO 0x09
156#define DRM_I810_FSTATUS 0x0a
157#define DRM_I810_OV0FLIP 0x0b
158#define DRM_I810_MC 0x0c
159#define DRM_I810_RSTATUS 0x0d
160#define DRM_I810_FLIP 0x0e
161#define DRM_IOCTL_I810_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
162#define DRM_IOCTL_I810_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
163#define DRM_IOCTL_I810_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
164#define DRM_IOCTL_I810_FLUSH DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLUSH)
165#define DRM_IOCTL_I810_GETAGE DRM_IO(DRM_COMMAND_BASE + DRM_I810_GETAGE)
166#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
167#define DRM_IOCTL_I810_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_I810_SWAP)
168#define DRM_IOCTL_I810_COPY DRM_IOW(DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
169#define DRM_IOCTL_I810_DOCOPY DRM_IO(DRM_COMMAND_BASE + DRM_I810_DOCOPY)
170#define DRM_IOCTL_I810_OV0INFO DRM_IOR(DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
171#define DRM_IOCTL_I810_FSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_FSTATUS)
172#define DRM_IOCTL_I810_OV0FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
173#define DRM_IOCTL_I810_MC DRM_IOW(DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
174#define DRM_IOCTL_I810_RSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_RSTATUS)
175#define DRM_IOCTL_I810_FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLIP)
176typedef struct _drm_i810_clear {
177  int clear_color;
178  int clear_depth;
179  int flags;
180} drm_i810_clear_t;
181typedef struct _drm_i810_vertex {
182  int idx;
183  int used;
184  int discard;
185} drm_i810_vertex_t;
186typedef struct _drm_i810_copy_t {
187  int idx;
188  int used;
189  void * address;
190} drm_i810_copy_t;
191#define PR_TRIANGLES (0x0 << 18)
192#define PR_TRISTRIP_0 (0x1 << 18)
193#define PR_TRISTRIP_1 (0x2 << 18)
194#define PR_TRIFAN (0x3 << 18)
195#define PR_POLYGON (0x4 << 18)
196#define PR_LINES (0x5 << 18)
197#define PR_LINESTRIP (0x6 << 18)
198#define PR_RECTS (0x7 << 18)
199#define PR_MASK (0x7 << 18)
200typedef struct drm_i810_dma {
201  void * __linux_virtual;
202  int request_idx;
203  int request_size;
204  int granted;
205} drm_i810_dma_t;
206typedef struct _drm_i810_overlay_t {
207  unsigned int offset;
208  unsigned int physical;
209} drm_i810_overlay_t;
210typedef struct _drm_i810_mc {
211  int idx;
212  int used;
213  int num_blocks;
214  int * length;
215  unsigned int last_render;
216} drm_i810_mc_t;
217#ifdef __cplusplus
218}
219#endif
220#endif
221