1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef DRM_FOURCC_H 20#define DRM_FOURCC_H 21#include "drm.h" 22#ifdef __cplusplus 23extern "C" { 24#endif 25#define fourcc_code(a,b,c,d) ((__u32) (a) | ((__u32) (b) << 8) | ((__u32) (c) << 16) | ((__u32) (d) << 24)) 26#define DRM_FORMAT_BIG_ENDIAN (1U << 31) 27#define DRM_FORMAT_INVALID 0 28#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') 29#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') 30#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') 31#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') 32#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') 33#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') 34#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') 35#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') 36#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') 37#define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') 38#define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') 39#define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') 40#define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') 41#define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') 42#define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') 43#define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') 44#define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') 45#define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') 46#define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') 47#define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') 48#define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') 49#define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') 50#define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') 51#define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') 52#define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') 53#define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') 54#define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') 55#define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') 56#define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') 57#define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') 58#define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') 59#define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') 60#define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') 61#define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') 62#define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') 63#define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') 64#define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') 65#define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') 66#define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') 67#define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') 68#define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') 69#define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') 70#define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') 71#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') 72#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') 73#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') 74#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') 75#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') 76#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') 77#define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') 78#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') 79#define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') 80#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') 81#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') 82#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') 83#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') 84#define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') 85#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') 86#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') 87#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') 88#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') 89#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') 90#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') 91#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') 92#define DRM_FORMAT_XVYU12_16161616 fourcc_code('X', 'V', '3', '6') 93#define DRM_FORMAT_XVYU16161616 fourcc_code('X', 'V', '4', '8') 94#define DRM_FORMAT_Y0L0 fourcc_code('Y', '0', 'L', '0') 95#define DRM_FORMAT_X0L0 fourcc_code('X', '0', 'L', '0') 96#define DRM_FORMAT_Y0L2 fourcc_code('Y', '0', 'L', '2') 97#define DRM_FORMAT_X0L2 fourcc_code('X', '0', 'L', '2') 98#define DRM_FORMAT_YUV420_8BIT fourcc_code('Y', 'U', '0', '8') 99#define DRM_FORMAT_YUV420_10BIT fourcc_code('Y', 'U', '1', '0') 100#define DRM_FORMAT_XRGB8888_A8 fourcc_code('X', 'R', 'A', '8') 101#define DRM_FORMAT_XBGR8888_A8 fourcc_code('X', 'B', 'A', '8') 102#define DRM_FORMAT_RGBX8888_A8 fourcc_code('R', 'X', 'A', '8') 103#define DRM_FORMAT_BGRX8888_A8 fourcc_code('B', 'X', 'A', '8') 104#define DRM_FORMAT_RGB888_A8 fourcc_code('R', '8', 'A', '8') 105#define DRM_FORMAT_BGR888_A8 fourcc_code('B', '8', 'A', '8') 106#define DRM_FORMAT_RGB565_A8 fourcc_code('R', '5', 'A', '8') 107#define DRM_FORMAT_BGR565_A8 fourcc_code('B', '5', 'A', '8') 108#define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') 109#define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') 110#define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') 111#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') 112#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') 113#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') 114#define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') 115#define DRM_FORMAT_P210 fourcc_code('P', '2', '1', '0') 116#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') 117#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') 118#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') 119#define DRM_FORMAT_Q410 fourcc_code('Q', '4', '1', '0') 120#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1') 121#define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9') 122#define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9') 123#define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1') 124#define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1') 125#define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2') 126#define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2') 127#define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6') 128#define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6') 129#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') 130#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') 131#define DRM_FORMAT_MOD_NONE 0 132#define DRM_FORMAT_MOD_VENDOR_NONE 0 133#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01 134#define DRM_FORMAT_MOD_VENDOR_AMD 0x02 135#define DRM_FORMAT_MOD_VENDOR_NVIDIA 0x03 136#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04 137#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05 138#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06 139#define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 140#define DRM_FORMAT_MOD_VENDOR_ARM 0x08 141#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 142#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a 143#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1) 144#define fourcc_mod_code(vendor,val) ((((__u64) DRM_FORMAT_MOD_VENDOR_ ##vendor) << 56) | ((val) & 0x00ffffffffffffffULL)) 145#define DRM_FORMAT_MOD_GENERIC_16_16_TILE DRM_FORMAT_MOD_SAMSUNG_16_16_TILE 146#define DRM_FORMAT_MOD_INVALID fourcc_mod_code(NONE, DRM_FORMAT_RESERVED) 147#define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0) 148#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1) 149#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2) 150#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3) 151#define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4) 152#define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5) 153#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6) 154#define I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7) 155#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1) 156#define DRM_FORMAT_MOD_SAMSUNG_16_16_TILE fourcc_mod_code(SAMSUNG, 2) 157#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) 158#define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1) 159#define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2) 160#define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3) 161#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4) 162#define DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED fourcc_mod_code(NVIDIA, 1) 163#define DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D(c,s,g,k,h) fourcc_mod_code(NVIDIA, (0x10 | ((h) & 0xf) | (((k) & 0xff) << 12) | (((g) & 0x3) << 20) | (((s) & 0x1) << 22) | (((c) & 0x7) << 23))) 164#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D(0, 0, 0, 0, (v)) 165#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_ONE_GOB DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0) 166#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_TWO_GOB DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1) 167#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_FOUR_GOB DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2) 168#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_EIGHT_GOB DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3) 169#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_SIXTEEN_GOB DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4) 170#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5) 171#define __fourcc_mod_broadcom_param_shift 8 172#define __fourcc_mod_broadcom_param_bits 48 173#define fourcc_mod_broadcom_code(val,params) fourcc_mod_code(BROADCOM, ((((__u64) params) << __fourcc_mod_broadcom_param_shift) | val)) 174#define fourcc_mod_broadcom_param(m) ((int) (((m) >> __fourcc_mod_broadcom_param_shift) & ((1ULL << __fourcc_mod_broadcom_param_bits) - 1))) 175#define fourcc_mod_broadcom_mod(m) ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << __fourcc_mod_broadcom_param_shift)) 176#define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1) 177#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) fourcc_mod_broadcom_code(2, v) 178#define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) fourcc_mod_broadcom_code(3, v) 179#define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) fourcc_mod_broadcom_code(4, v) 180#define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) fourcc_mod_broadcom_code(5, v) 181#define DRM_FORMAT_MOD_BROADCOM_SAND32 DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(0) 182#define DRM_FORMAT_MOD_BROADCOM_SAND64 DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(0) 183#define DRM_FORMAT_MOD_BROADCOM_SAND128 DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(0) 184#define DRM_FORMAT_MOD_BROADCOM_SAND256 DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(0) 185#define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6) 186#define DRM_FORMAT_MOD_ARM_CODE(__type,__val) fourcc_mod_code(ARM, ((__u64) (__type) << 52) | ((__val) & 0x000fffffffffffffULL)) 187#define DRM_FORMAT_MOD_ARM_TYPE_AFBC 0x00 188#define DRM_FORMAT_MOD_ARM_TYPE_MISC 0x01 189#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AFBC, __afbc_mode) 190#define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK 0xf 191#define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 (1ULL) 192#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 (2ULL) 193#define AFBC_FORMAT_MOD_BLOCK_SIZE_64x4 (3ULL) 194#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4 (4ULL) 195#define AFBC_FORMAT_MOD_YTR (1ULL << 4) 196#define AFBC_FORMAT_MOD_SPLIT (1ULL << 5) 197#define AFBC_FORMAT_MOD_SPARSE (1ULL << 6) 198#define AFBC_FORMAT_MOD_CBR (1ULL << 7) 199#define AFBC_FORMAT_MOD_TILED (1ULL << 8) 200#define AFBC_FORMAT_MOD_SC (1ULL << 9) 201#define AFBC_FORMAT_MOD_DB (1ULL << 10) 202#define AFBC_FORMAT_MOD_BCH (1ULL << 11) 203#define AFBC_FORMAT_MOD_USM (1ULL << 12) 204#define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL) 205#define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1) 206#define __fourcc_mod_amlogic_layout_mask 0xf 207#define __fourcc_mod_amlogic_options_shift 8 208#define __fourcc_mod_amlogic_options_mask 0xf 209#define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout,__options) fourcc_mod_code(AMLOGIC, ((__layout) & __fourcc_mod_amlogic_layout_mask) | (((__options) & __fourcc_mod_amlogic_options_mask) << __fourcc_mod_amlogic_options_shift)) 210#define AMLOGIC_FBC_LAYOUT_BASIC (1ULL) 211#define AMLOGIC_FBC_LAYOUT_SCATTER (2ULL) 212#define AMLOGIC_FBC_OPTION_MEM_SAVING (1ULL << 0) 213#ifdef __cplusplus 214} 215#endif 216#endif 217