1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19
20#ifndef __LINUX_KVM_LOONGARCH_H
21#define __LINUX_KVM_LOONGARCH_H
22
23#include <linux/types.h>
24
25#include <stdint.h>
26
27#define __KVM_HAVE_GUEST_DEBUG
28#define KVM_GUESTDBG_USE_SW_BP 0x00010000
29#define KVM_GUESTDBG_USE_HW_BP 0x00020000
30#define KVM_DATA_HW_BREAKPOINT_NUM 8
31#define KVM_INST_HW_BREAKPOINT_NUM 8
32
33/*
34 * KVM Loongarch specific structures and definitions.
35 *
36 * Some parts derived from the x86 version of this file.
37 */
38
39#define __KVM_HAVE_READONLY_MEM
40
41#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
42
43/*
44 * for KVM_GET_REGS and KVM_SET_REGS
45 */
46struct kvm_regs {
47	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
48	__u64 gpr[32];
49	__u64 pc;
50};
51
52/*
53 * for KVM_GET_CPUCFG
54 */
55struct kvm_cpucfg {
56	/* out (KVM_GET_CPUCFG) */
57	__u32 cpucfg[64];
58};
59
60/*
61 * for KVM_GET_FPU and KVM_SET_FPU
62 */
63struct kvm_fpu {
64	__u32 fcsr;
65	__u64 fcc;    /* 8x8 */
66	struct kvm_fpureg {
67		__u64 val64[4];	//support max 256 bits
68	} fpr[32];
69};
70
71/*
72 * For LOONGARCH, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access various
73 * registers.  The id field is broken down as follows:
74 *
75 *  bits[63..52] - As per linux/kvm.h
76 *  bits[51..32] - Must be zero.
77 *  bits[31..16] - Register set.
78 *
79 * Register set = 0: GP registers from kvm_regs (see definitions below).
80 * Register set = 1: CSR registers.
81 * Register set = 2: KVM specific registers (see definitions below).
82 * Register set = 3: FPU / SIMD registers (see definitions below).
83 * Register set = 4: LBT registers (see definitions below).
84 *
85 * Other sets registers may be added in the future.  Each set would
86 * have its own identifier in bits[31..16].
87 */
88
89#define KVM_REG_LOONGARCH_GP		(KVM_REG_LOONGARCH | 0x00000ULL)
90#define KVM_REG_LOONGARCH_CSR		(KVM_REG_LOONGARCH | 0x10000ULL)
91#define KVM_REG_LOONGARCH_KVM		(KVM_REG_LOONGARCH | 0x20000ULL)
92#define KVM_REG_LOONGARCH_FPU		(KVM_REG_LOONGARCH | 0x30000ULL)
93#define KVM_REG_LOONGARCH_LBT		(KVM_REG_LOONGARCH | 0x40000ULL)
94#define KVM_REG_LOONGARCH_MASK		(KVM_REG_LOONGARCH | 0x70000ULL)
95#define KVM_CSR_IDX_MASK		(0x10000 - 1)
96
97/*
98 * KVM_REG_LOONGARCH_KVM - KVM specific control registers.
99 */
100#define KVM_REG_LOONGARCH_COUNTER	(KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 3)
101#define KVM_REG_LOONGARCH_VCPU_RESET	(KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 4)
102
103#define KVM_REG_LBT_SCR0	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 1)
104#define KVM_REG_LBT_SCR1	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 2)
105#define KVM_REG_LBT_SCR2	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 3)
106#define KVM_REG_LBT_SCR3	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 4)
107#define KVM_REG_LBT_FLAGS	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 5)
108#define KVM_REG_LBT_FTOP	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 6)
109
110#define __KVM_HAVE_IRQ_LINE
111
112struct kvm_debug_exit_arch {
113	__u64 era;
114	__u32 fwps;
115	__u32 mwps;
116	__u32 exception;
117};
118
119/* for KVM_SET_GUEST_DEBUG */
120struct hw_breakpoint {
121    __u64 addr;
122    __u64 mask;
123    __u32 asid;
124    __u32 ctrl;
125};
126
127struct kvm_guest_debug_arch {
128	struct hw_breakpoint data_breakpoint[KVM_DATA_HW_BREAKPOINT_NUM];
129	struct hw_breakpoint inst_breakpoint[KVM_INST_HW_BREAKPOINT_NUM];
130	int inst_bp_nums, data_bp_nums;
131};
132
133/* definition of registers in kvm_run */
134struct kvm_sync_regs {
135};
136
137/* dummy definition */
138struct kvm_sregs {
139};
140
141struct kvm_iocsr_entry {
142	__u32 addr;
143	__u32 pad;
144	__u64 data;
145};
146
147struct kvm_csr_entry {
148	__u32 index;
149	__u32 reserved;
150	__u64 data;
151};
152
153/* for KVM_GET_MSRS and KVM_SET_MSRS */
154struct kvm_msrs {
155	__u32 ncsrs; /* number of msrs in entries */
156	__u32 pad;
157
158	struct kvm_csr_entry entries[0];
159};
160
161struct kvm_loongarch_interrupt {
162	/* in */
163	__u32 cpu;
164	__u32 irq;
165};
166
167#define KVM_IRQCHIP_LS7A_IOAPIC	0x0
168#define KVM_IRQCHIP_LS3A_GIPI	0x1
169#define KVM_IRQCHIP_LS3A_HT_IRQ	0x2
170#define KVM_IRQCHIP_LS3A_ROUTE	0x3
171#define KVM_IRQCHIP_LS3A_EXTIRQ	0x4
172#define KVM_IRQCHIP_LS3A_IPMASK	0x5
173#define KVM_NR_IRQCHIPS          1
174#define KVM_IRQCHIP_NUM_PINS    64
175
176#define KVM_MAX_CORES			256
177#define KVM_EXTIOI_IRQS			(256)
178#define KVM_EXTIOI_IRQS_BITMAP_SIZE	(KVM_EXTIOI_IRQS / 8)
179/* map to ipnum per 32 irqs */
180#define KVM_EXTIOI_IRQS_IPMAP_SIZE	(KVM_EXTIOI_IRQS / 32)
181#define KVM_EXTIOI_IRQS_PER_GROUP	32
182#define KVM_EXTIOI_IRQS_COREMAP_SIZE	(KVM_EXTIOI_IRQS)
183#define KVM_EXTIOI_IRQS_NODETYPE_SIZE	16
184
185struct ls7a_ioapic_state {
186	/* 0x000 interrupt id register */
187	__u64 int_id;
188	/* 0x020 interrupt mask register */
189	__u64 int_mask;
190	/* 0x040 1=msi */
191	__u64 htmsi_en;
192	/* 0x060 edge=1 level  =0 */
193	__u64 intedge;
194	/* 0x080 for clean edge int,set 1 clean,set 0 is noused */
195	__u64 intclr;
196	/* 0x0c0 */
197	__u64 auto_crtl0;
198	/* 0x0e0 */
199	__u64 auto_crtl1;
200	/* 0x100 - 0x140 */
201	__u8 route_entry[64];
202	/* 0x200 - 0x240 */
203	__u8 htmsi_vector[64];
204	/* 0x300 */
205	__u64 intisr_chip0;
206	/* 0x320 */
207	__u64 intisr_chip1;
208	/* edge detection */
209	__u64 last_intirr;
210	/* 0x380 interrupt request register */
211	__u64 intirr;
212	/* 0x3a0 interrupt service register */
213	__u64 intisr;
214	/* 0x3e0 interrupt level polarity selection register,
215	 * 0 for high level tirgger
216	 */
217	__u64 int_polarity;
218};
219
220struct loongarch_gipi_single {
221	__u32 status;
222	__u32 en;
223	__u32 set;
224	__u32 clear;
225	__u64 buf[4];
226};
227
228struct loongarch_gipiState {
229	struct loongarch_gipi_single core[KVM_MAX_CORES];
230};
231
232struct kvm_loongarch_ls3a_extirq_state {
233	union ext_en_r {
234		uint64_t reg_u64[KVM_EXTIOI_IRQS_BITMAP_SIZE / 8];
235		uint32_t reg_u32[KVM_EXTIOI_IRQS_BITMAP_SIZE / 4];
236		uint8_t reg_u8[KVM_EXTIOI_IRQS_BITMAP_SIZE];
237	} ext_en_r;
238	union bounce_r {
239		uint64_t reg_u64[KVM_EXTIOI_IRQS_BITMAP_SIZE / 8];
240		uint32_t reg_u32[KVM_EXTIOI_IRQS_BITMAP_SIZE / 4];
241		uint8_t reg_u8[KVM_EXTIOI_IRQS_BITMAP_SIZE];
242	} bounce_r;
243	union ext_isr_r {
244		uint64_t reg_u64[KVM_EXTIOI_IRQS_BITMAP_SIZE / 8];
245		uint32_t reg_u32[KVM_EXTIOI_IRQS_BITMAP_SIZE / 4];
246		uint8_t reg_u8[KVM_EXTIOI_IRQS_BITMAP_SIZE];
247	} ext_isr_r;
248	union ext_core_isr_r {
249		uint64_t reg_u64[KVM_MAX_CORES][KVM_EXTIOI_IRQS_BITMAP_SIZE / 8];
250		uint32_t reg_u32[KVM_MAX_CORES][KVM_EXTIOI_IRQS_BITMAP_SIZE / 4];
251		uint8_t reg_u8[KVM_MAX_CORES][KVM_EXTIOI_IRQS_BITMAP_SIZE];
252	} ext_core_isr_r;
253	union ip_map_r {
254		uint64_t reg_u64;
255		uint32_t reg_u32[KVM_EXTIOI_IRQS_IPMAP_SIZE / 4];
256		uint8_t reg_u8[KVM_EXTIOI_IRQS_IPMAP_SIZE];
257	} ip_map_r;
258	union core_map_r {
259		uint64_t reg_u64[KVM_EXTIOI_IRQS_COREMAP_SIZE / 8];
260		uint32_t reg_u32[KVM_EXTIOI_IRQS_COREMAP_SIZE / 4];
261		uint8_t reg_u8[KVM_EXTIOI_IRQS_COREMAP_SIZE];
262	} core_map_r;
263	union node_type_r {
264		uint64_t reg_u64[KVM_EXTIOI_IRQS_NODETYPE_SIZE / 4];
265		uint32_t reg_u32[KVM_EXTIOI_IRQS_NODETYPE_SIZE / 2];
266		uint16_t reg_u16[KVM_EXTIOI_IRQS_NODETYPE_SIZE];
267		uint8_t reg_u8[KVM_EXTIOI_IRQS_NODETYPE_SIZE * 2];
268	} node_type_r;
269};
270
271struct loongarch_kvm_irqchip {
272	__u16 chip_id;
273	__u16 len;
274	__u16 vcpu_id;
275	__u16 reserved;
276	char data[0];
277};
278
279#endif /* __LINUX_KVM_LOONGARCH_H */
280