1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _ASM_INST_H
20#define _ASM_INST_H
21
22#include <asm/bitfield.h>
23
24enum reg0_op {
25	tlbclr_op = 0x19208, gtlbclr_op=0x19208,
26	tlbflush_op = 0x19209, gtlbflush_op=0x19209,
27	tlbsrch_op = 0x1920a, gtlbsrch_op=0x1920a,
28	tlbrd_op = 0x1920b, gtlbrd_op=0x1920b,
29	tlbwr_op = 0x1920c, gtlbwr_op=0x1920c,
30	tlbfill_op = 0x1920d, gtlbfill_op=0x1920d,
31	ertn_op = 0x1920e,
32};
33
34enum reg0i15_op {
35	break_op = 0x54, dbcl_op, syscall_op, hypcall_op,
36	idle_op = 0xc91, dbar_op = 0x70e4, ibar_op,
37};
38
39enum reg0i26_op {
40	b_op = 0x14, bl_op,
41};
42
43enum reg1i20_op {
44	lu12iw_op = 0xa, lu32id_op, pcaddi_op, pcalau12i_op,
45	pcaddu12i_op, pcaddu18i_op,
46};
47
48enum reg1i21_op {
49	beqz_op = 0x10, bnez_op, bceqz_op, bcnez_op=0x12, jiscr0_op=0x12, jiscr1_op=0x12,
50};
51
52enum reg2_op {
53	gr2scr_op = 0x2, scr2gr_op, clow_op,
54	clzw_op, ctow_op, ctzw_op, clod_op,
55	clzd_op, ctod_op, ctzd_op, revb2h_op,
56	revb4h_op, revb2w_op, revbd_op, revh2w_op,
57	revhd_op, bitrev4b_op, bitrev8b_op, bitrevw_op,
58	bitrevd_op, extwh_op, extwb_op, rdtimelw_op,
59	rdtimehw_op, rdtimed_op, cpucfg_op,
60	iocsrrdb_op = 0x19200, iocsrrdh_op, iocsrrdw_op, iocsrrdd_op,
61	iocsrwrb_op, iocsrwrh_op, iocsrwrw_op, iocsrwrd_op,
62	movgr2fcsr_op = 0x4530, movfcsr2gr_op = 0x4532,
63	movgr2cf_op = 0x4536, movcf2gr_op = 0x4537,
64};
65
66enum reg2ui3_op {
67	rotrib_op = 0x261, rcrib_op = 0x281,
68};
69
70enum reg2ui4_op {
71	rotrih_op = 0x131, rcrih_op = 0x141,
72};
73
74enum reg2ui5_op {
75	slliw_op = 0x81, srliw_op = 0x89, sraiw_op = 0x91, rotriw_op = 0x99,
76	rcriw_op = 0xa1,
77};
78
79enum reg2ui6_op {
80	sllid_op = 0x41, srlid_op = 0x45, sraid_op = 0x49, rotrid_op = 0x4d,
81	rcrid_op = 0x51,
82};
83
84enum reg2ui12_op {
85	andi_op = 0xd, ori_op, xori_op,
86};
87
88enum reg2lsbw_op {
89	bstrinsw_op = 0x3, bstrpickw_op = 0x3,
90};
91
92enum reg2lsbd_op {
93	bstrinsd_op = 0x2, bstrpickd_op = 0x3,
94};
95
96enum reg2i8_op {
97	lddir_op = 0x190, ldpte_op,
98};
99
100enum reg2i8idx1_op {
101	vstelmd_op = 0x622,
102};
103
104enum reg2i8idx2_op {
105	vstelmw_op = 0x312, xvstelmd_op = 0x331,
106};
107
108enum reg2i8idx3_op {
109	vstelmh_op = 0x18a, xvstelmw_op = 0x199,
110};
111
112enum reg2i8idx4_op {
113	vstelmb_op = 0xc6, xvstelmh_op = 0xcd,
114};
115
116enum reg2i8idx5_op {
117	xvstelmb_op = 0x67,
118};
119
120enum reg2i9_op {
121	vldrepld_op = 0x602, xvldrepld_op = 0x642,
122};
123
124enum reg2i10_op {
125	vldreplw_op = 0x302, xvldreplw_op = 0x322,
126};
127
128enum reg2i11_op {
129	vldreplh_op = 0x182, xvldreplh_op = 0x192,
130};
131
132enum reg2i12_op {
133	slti_op = 0x8, sltui_op, addiw_op, addid_op,
134	lu52id_op, cacop_op = 0x18, xvldreplb_op = 0xca,
135	ldb_op = 0xa0, ldh_op, ldw_op, ldd_op, stb_op, sth_op,
136	stw_op, std_op, ldbu_op, ldhu_op, ldwu_op, preld_op,
137	flds_op, fsts_op, fldd_op, fstd_op, vld_op, vst_op, xvld_op,
138	xvst_op, ldlw_op = 0xb8, ldrw_op, ldld_op, ldrd_op, stlw_op,
139	strw_op, stld_op, strd_op, vldreplb_op = 0xc2,
140};
141
142enum reg2i14_op {
143	llw_op = 0x20, scw_op, lld_op, scd_op, ldptrw_op, stptrw_op,
144	ldptrd_op, stptrd_op,
145};
146
147enum reg2i16_op {
148	addu16id_op = 0x4, jirl_op = 0x13, beq_op = 0x16, bne_op, blt_op, bge_op, bltu_op, bgeu_op,
149};
150
151enum reg2csr_op {
152	csrrd_op = 0x4, csrwr_op = 0x4, csrxchg_op = 0x4,
153	gcsrrd_op = 0x5, gcsrwr_op = 0x5, gcsrxchg_op = 0x5,
154};
155
156enum reg3_op {
157	asrtled_op = 0x2, asrtgtd_op,
158	addw_op = 0x20, addd_op, subw_op, subd_op,
159	slt_op, sltu_op, maskeqz_op, masknez_op,
160	nor_op, and_op, or_op, xor_op, orn_op,
161	andn_op, sllw_op, srlw_op, sraw_op, slld_op,
162	srld_op, srad_op, rotrb_op, rotrh_op,
163	rotrw_op, rotrd_op, mulw_op, mulhw_op,
164	mulhwu_op, muld_op, mulhd_op, mulhdu_op,
165	mulwdw_op, mulwdwu_op, divw_op, modw_op,
166	divwu_op, modwu_op, divd_op, modd_op,
167	divdu_op, moddu_op, crcwbw_op,
168	crcwhw_op, crcwww_op, crcwdw_op, crccwbw_op,
169	crccwhw_op, crccwww_op, crccwdw_op, addu12iw_op,
170	addu12id_op,
171	adcb_op = 0x60, adch_op, adcw_op, adcd_op,
172	sbcb_op, sbch_op, sbcw_op, sbcd_op,
173	rcrb_op, rcrh_op, rcrw_op, rcrd_op,
174	ldxb_op = 0x7000, ldxh_op = 0x7008, ldxw_op = 0x7010, ldxd_op = 0x7018,
175	stxb_op = 0x7020, stxh_op = 0x7028, stxw_op = 0x7030, stxd_op = 0x7038,
176	ldxbu_op = 0x7040, ldxhu_op = 0x7048, ldxwu_op = 0x7050,
177	preldx_op = 0x7058, fldxs_op = 0x7060, fldxd_op = 0x7068,
178	fstxs_op = 0x7070, fstxd_op = 0x7078, vldx_op = 0x7080,
179	vstx_op = 0x7088, xvldx_op = 0x7090, xvstx_op = 0x7098,
180	amswapw_op = 0x70c0, amswapd_op, amaddw_op, amaddd_op, amandw_op,
181	amandd_op, amorw_op, amord_op, amxorw_op, amxord_op, ammaxw_op,
182	ammaxd_op, amminw_op, ammind_op, ammaxwu_op, ammaxdu_op,
183	amminwu_op, ammindu_op, amswap_dbw_op, amswap_dbd_op, amadd_dbw_op,
184	amadd_dbd_op, amand_dbw_op, amand_dbd_op, amor_dbw_op, amor_dbd_op,
185	amxor_dbw_op, amxor_dbd_op, ammax_dbw_op, ammax_dbd_op, ammin_dbw_op,
186	ammin_dbd_op, ammax_dbwu_op, ammax_dbdu_op, ammin_dbwu_op,
187	ammin_dbdu_op, fldgts_op = 0x70e8, fldgtd_op,
188	fldles_op, fldled_op, fstgts_op, fstgtd_op, fstles_op, fstled_op,
189	ldgtb_op, ldgth_op, ldgtw_op, ldgtd_op, ldleb_op, ldleh_op, ldlew_op,
190	ldled_op, stgtb_op, stgth_op, stgtw_op, stgtd_op, stleb_op, stleh_op,
191	stlew_op, stled_op,
192};
193
194enum reg3sa2_op {
195	alslw_op = 0x2, alslwu_op, bytepickw_op, alsld_op = 0x16,
196
197};
198
199enum reg3sa3_op {
200	bytepickd_op = 0x3,
201};
202
203struct reg2_format {
204	__BITFIELD_FIELD(unsigned int opcode : 22,
205	__BITFIELD_FIELD(unsigned int rj : 5,
206	__BITFIELD_FIELD(unsigned int rd : 5,
207	;)))
208};
209
210struct reg2ui3_format {
211	__BITFIELD_FIELD(unsigned int opcode : 19,
212	__BITFIELD_FIELD(unsigned int simmediate : 3,
213	__BITFIELD_FIELD(unsigned int rj : 5,
214	__BITFIELD_FIELD(unsigned int rd : 5,
215	;))))
216};
217
218struct reg2ui4_format {
219	__BITFIELD_FIELD(unsigned int opcode : 18,
220	__BITFIELD_FIELD(unsigned int simmediate : 4,
221	__BITFIELD_FIELD(unsigned int rj : 5,
222	__BITFIELD_FIELD(unsigned int rd : 5,
223	;))))
224};
225
226struct reg2ui5_format {
227	__BITFIELD_FIELD(unsigned int opcode : 17,
228	__BITFIELD_FIELD(unsigned int simmediate : 5,
229	__BITFIELD_FIELD(unsigned int rj : 5,
230	__BITFIELD_FIELD(unsigned int rd : 5,
231	;))))
232};
233
234struct reg2ui6_format {
235	__BITFIELD_FIELD(unsigned int opcode : 16,
236	__BITFIELD_FIELD(unsigned int simmediate : 6,
237	__BITFIELD_FIELD(unsigned int rj : 5,
238	__BITFIELD_FIELD(unsigned int rd : 5,
239	;))))
240};
241
242struct reg2lsbw_format {
243	__BITFIELD_FIELD(unsigned int opcode : 11,
244	__BITFIELD_FIELD(unsigned int msbw : 5,
245	__BITFIELD_FIELD(unsigned int op : 1,
246	__BITFIELD_FIELD(unsigned int lsbw : 5,
247	__BITFIELD_FIELD(unsigned int rj : 5,
248	__BITFIELD_FIELD(unsigned int rd : 5,
249	;))))))
250};
251
252struct reg2lsbd_format {
253	__BITFIELD_FIELD(unsigned int opcode : 10,
254	__BITFIELD_FIELD(unsigned int msbd : 6,
255	__BITFIELD_FIELD(unsigned int lsbd : 6,
256	__BITFIELD_FIELD(unsigned int rj : 5,
257	__BITFIELD_FIELD(unsigned int rd : 5,
258	;)))))
259};
260
261struct reg3_format {
262	__BITFIELD_FIELD(unsigned int opcode : 17,
263	__BITFIELD_FIELD(unsigned int rk : 5,
264	__BITFIELD_FIELD(unsigned int rj : 5,
265	__BITFIELD_FIELD(unsigned int rd : 5,
266	;))))
267};
268
269struct reg3sa2_format {
270	__BITFIELD_FIELD(unsigned int opcode : 15,
271	__BITFIELD_FIELD(unsigned int simmediate : 2,
272	__BITFIELD_FIELD(unsigned int rk : 5,
273	__BITFIELD_FIELD(unsigned int rj : 5,
274	__BITFIELD_FIELD(unsigned int rd : 5,
275	;)))))
276};
277
278struct reg3sa3_format {
279	__BITFIELD_FIELD(unsigned int opcode : 14,
280	__BITFIELD_FIELD(unsigned int simmediate : 3,
281	__BITFIELD_FIELD(unsigned int rk : 5,
282	__BITFIELD_FIELD(unsigned int rj : 5,
283	__BITFIELD_FIELD(unsigned int rd : 5,
284	;)))))
285};
286
287struct reg3sa4_format {
288	__BITFIELD_FIELD(unsigned int opcode : 13,
289	__BITFIELD_FIELD(unsigned int simmediate : 4,
290	__BITFIELD_FIELD(unsigned int rk : 5,
291	__BITFIELD_FIELD(unsigned int rj : 5,
292	__BITFIELD_FIELD(unsigned int rd : 5,
293	;)))))
294};
295
296struct reg4_format {
297	__BITFIELD_FIELD(unsigned int opcode : 12,
298	__BITFIELD_FIELD(unsigned int fa : 5,
299	__BITFIELD_FIELD(unsigned int fk : 5,
300	__BITFIELD_FIELD(unsigned int fj : 5,
301	__BITFIELD_FIELD(unsigned int fd : 5,
302	;)))))
303};
304
305struct reg2i8_format {
306	__BITFIELD_FIELD(unsigned int opcode : 14,
307	__BITFIELD_FIELD(unsigned int simmediate : 8,
308	__BITFIELD_FIELD(unsigned int rj : 5,
309	__BITFIELD_FIELD(unsigned int rd : 5,
310	;))))
311};
312
313struct reg2i8idx1_format {
314	__BITFIELD_FIELD(unsigned int opcode : 13,
315	__BITFIELD_FIELD(unsigned int idx : 1,
316	__BITFIELD_FIELD(unsigned int simmediate : 8,
317	__BITFIELD_FIELD(unsigned int rj : 5,
318	__BITFIELD_FIELD(unsigned int rd : 5,
319	;)))))
320};
321
322struct reg2i8idx2_format {
323	__BITFIELD_FIELD(unsigned int opcode : 12,
324	__BITFIELD_FIELD(unsigned int idx : 2,
325	__BITFIELD_FIELD(unsigned int simmediate : 8,
326	__BITFIELD_FIELD(unsigned int rj : 5,
327	__BITFIELD_FIELD(unsigned int rd : 5,
328	;)))))
329};
330
331struct reg2i8idx3_format {
332	__BITFIELD_FIELD(unsigned int opcode : 11,
333	__BITFIELD_FIELD(unsigned int idx : 3,
334	__BITFIELD_FIELD(unsigned int simmediate : 8,
335	__BITFIELD_FIELD(unsigned int rj : 5,
336	__BITFIELD_FIELD(unsigned int rd : 5,
337	;)))))
338};
339
340struct reg2i8idx4_format {
341	__BITFIELD_FIELD(unsigned int opcode : 10,
342	__BITFIELD_FIELD(unsigned int idx : 4,
343	__BITFIELD_FIELD(unsigned int simmediate : 8,
344	__BITFIELD_FIELD(unsigned int rj : 5,
345	__BITFIELD_FIELD(unsigned int rd : 5,
346	;)))))
347};
348
349struct reg2i8idx5_format {
350	__BITFIELD_FIELD(unsigned int opcode : 9,
351	__BITFIELD_FIELD(unsigned int idx : 5,
352	__BITFIELD_FIELD(unsigned int simmediate : 8,
353	__BITFIELD_FIELD(unsigned int rj : 5,
354	__BITFIELD_FIELD(unsigned int rd : 5,
355	;)))))
356};
357
358struct reg2i9_format {
359	__BITFIELD_FIELD(unsigned int opcode : 13,
360	__BITFIELD_FIELD(unsigned int simmediate : 9,
361	__BITFIELD_FIELD(unsigned int rj : 5,
362	__BITFIELD_FIELD(unsigned int rd : 5,
363	;))))
364};
365
366struct reg2i10_format {
367	__BITFIELD_FIELD(unsigned int opcode : 12,
368	__BITFIELD_FIELD(unsigned int simmediate : 10,
369	__BITFIELD_FIELD(unsigned int rj : 5,
370	__BITFIELD_FIELD(unsigned int rd : 5,
371	;))))
372};
373
374struct reg2i11_format {
375	__BITFIELD_FIELD(unsigned int opcode : 11,
376	__BITFIELD_FIELD(unsigned int simmediate : 11,
377	__BITFIELD_FIELD(unsigned int rj : 5,
378	__BITFIELD_FIELD(unsigned int rd : 5,
379	;))))
380};
381
382struct reg2i12_format {
383	__BITFIELD_FIELD(unsigned int opcode : 10,
384	__BITFIELD_FIELD(signed int simmediate : 12,
385	__BITFIELD_FIELD(unsigned int rj : 5,
386	__BITFIELD_FIELD(unsigned int rd : 5,
387	;))))
388};
389
390struct reg2ui12_format {
391	__BITFIELD_FIELD(unsigned int opcode : 10,
392	__BITFIELD_FIELD(unsigned int simmediate : 12,
393	__BITFIELD_FIELD(unsigned int rj : 5,
394	__BITFIELD_FIELD(unsigned int rd : 5,
395	;))))
396};
397
398struct reg2i14_format {
399	__BITFIELD_FIELD(unsigned int opcode : 8,
400	__BITFIELD_FIELD(unsigned int simmediate : 14,
401	__BITFIELD_FIELD(unsigned int rj : 5,
402	__BITFIELD_FIELD(unsigned int rd : 5,
403	;))))
404};
405
406struct reg2i16_format {
407	__BITFIELD_FIELD(unsigned int opcode : 6,
408	__BITFIELD_FIELD(unsigned int simmediate : 16,
409	__BITFIELD_FIELD(unsigned int rj : 5,
410	__BITFIELD_FIELD(unsigned int rd : 5,
411	;))))
412};
413
414struct reg2csr_format {
415	__BITFIELD_FIELD(unsigned int opcode : 8,
416	__BITFIELD_FIELD(unsigned int csr : 14,
417	__BITFIELD_FIELD(unsigned int rj : 5,
418	__BITFIELD_FIELD(unsigned int rd : 5,
419	;))))
420};
421
422struct reg1i21_format {
423	__BITFIELD_FIELD(unsigned int opcode : 6,
424	__BITFIELD_FIELD(unsigned int simmediate_l : 16,
425	__BITFIELD_FIELD(unsigned int rj : 5,
426	__BITFIELD_FIELD(unsigned int simmediate_h  : 5,
427	;))))
428};
429
430struct reg1i20_format {
431	__BITFIELD_FIELD(unsigned int opcode : 7,
432	__BITFIELD_FIELD(unsigned int simmediate : 20,
433	__BITFIELD_FIELD(unsigned int rd : 5,
434	;)))
435};
436
437struct reg0i15_format {
438	__BITFIELD_FIELD(unsigned int opcode : 17,
439	__BITFIELD_FIELD(unsigned int simmediate : 15,
440	;))
441};
442
443struct reg0i26_format {
444	__BITFIELD_FIELD(unsigned int opcode : 6,
445	__BITFIELD_FIELD(unsigned int simmediate_l : 16,
446	__BITFIELD_FIELD(unsigned int simmediate_h : 10,
447	;)))
448};
449
450union loongarch_instruction {
451	unsigned int word;
452	unsigned short halfword[2];
453	unsigned char byte[4];
454	struct reg2_format reg2_format;
455	struct reg2ui3_format reg2ui3_format;
456	struct reg2ui4_format reg2ui4_format;
457	struct reg2ui5_format reg2ui5_format;
458	struct reg2ui6_format reg2ui6_format;
459	struct reg2ui12_format reg2ui12_format;
460	struct reg2lsbw_format reg2lsbw_format;
461	struct reg2lsbd_format reg2lsbd_format;
462	struct reg3_format reg3_format;
463	struct reg3sa2_format reg3sa2_format;
464	struct reg3sa3_format reg3sa3_format;
465	struct reg3sa4_format reg3sa4_format;
466	struct reg4_format reg4_format;
467	struct reg2i8_format reg2i8_format;
468	struct reg2i8idx1_format reg2i8idx1_format;
469	struct reg2i8idx2_format reg2i8idx2_format;
470	struct reg2i8idx3_format reg2i8idx3_format;
471	struct reg2i8idx4_format reg2i8idx4_format;
472	struct reg2i8idx5_format reg2i8idx5_format;
473	struct reg2i9_format reg2i9_format;
474	struct reg2i10_format reg2i10_format;
475	struct reg2i11_format reg2i11_format;
476	struct reg2i12_format reg2i12_format;
477	struct reg2i14_format reg2i14_format;
478	struct reg2i16_format reg2i16_format;
479	struct reg2csr_format reg2csr_format;
480	struct reg1i21_format reg1i21_format;
481	struct reg1i20_format reg1i20_format;
482	struct reg0i15_format reg0i15_format;
483	struct reg0i26_format reg0i26_format;
484};
485
486#endif /* _ASM_INST_H */
487