1/*
2 * This header was generated from the Linux kernel headers by update_headers.py,
3 * to provide necessary information from kernel to userspace, such as constants,
4 * structures, and macros, and thus, contains no copyrightable information.
5 */
6#ifndef MLX4_ABI_USER_H
7#define MLX4_ABI_USER_H
8#include <linux/types.h>
9#define MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION	3
10#define MLX4_IB_UVERBS_ABI_VERSION		4
11struct mlx4_ib_alloc_ucontext_resp_v3 {
12	__u32	qp_tab_size;
13	__u16	bf_reg_size;
14	__u16	bf_regs_per_page;
15};
16enum {
17	MLX4_USER_DEV_CAP_LARGE_CQE	= 1L << 0,
18};
19struct mlx4_ib_alloc_ucontext_resp {
20	__u32	dev_caps;
21	__u32	qp_tab_size;
22	__u16	bf_reg_size;
23	__u16	bf_regs_per_page;
24	__u32	cqe_size;
25};
26struct mlx4_ib_alloc_pd_resp {
27	__u32	pdn;
28	__u32	reserved;
29};
30struct mlx4_ib_create_cq {
31	__aligned_u64 buf_addr;
32	__aligned_u64 db_addr;
33};
34struct mlx4_ib_create_cq_resp {
35	__u32	cqn;
36	__u32	reserved;
37};
38struct mlx4_ib_resize_cq {
39	__aligned_u64 buf_addr;
40};
41struct mlx4_ib_create_srq {
42	__aligned_u64 buf_addr;
43	__aligned_u64 db_addr;
44};
45struct mlx4_ib_create_srq_resp {
46	__u32	srqn;
47	__u32	reserved;
48};
49struct mlx4_ib_create_qp_rss {
50	__aligned_u64 rx_hash_fields_mask;
51	__u8    rx_hash_function;
52	__u8    reserved[7];
53	__u8    rx_hash_key[40];
54	__u32   comp_mask;
55	__u32   reserved1;
56};
57struct mlx4_ib_create_qp {
58	__aligned_u64 buf_addr;
59	__aligned_u64 db_addr;
60	__u8	log_sq_bb_count;
61	__u8	log_sq_stride;
62	__u8	sq_no_prefetch;
63	__u8	reserved;
64	__u32	inl_recv_sz;
65};
66struct mlx4_ib_create_wq {
67	__aligned_u64 buf_addr;
68	__aligned_u64 db_addr;
69	__u8	log_range_size;
70	__u8	reserved[3];
71	__u32   comp_mask;
72};
73struct mlx4_ib_modify_wq {
74	__u32	comp_mask;
75	__u32	reserved;
76};
77struct mlx4_ib_create_rwq_ind_tbl_resp {
78	__u32	response_length;
79	__u32	reserved;
80};
81enum mlx4_ib_rx_hash_function_flags {
82	MLX4_IB_RX_HASH_FUNC_TOEPLITZ	= 1 << 0,
83};
84enum mlx4_ib_rx_hash_fields {
85	MLX4_IB_RX_HASH_SRC_IPV4	= 1 << 0,
86	MLX4_IB_RX_HASH_DST_IPV4	= 1 << 1,
87	MLX4_IB_RX_HASH_SRC_IPV6	= 1 << 2,
88	MLX4_IB_RX_HASH_DST_IPV6	= 1 << 3,
89	MLX4_IB_RX_HASH_SRC_PORT_TCP	= 1 << 4,
90	MLX4_IB_RX_HASH_DST_PORT_TCP	= 1 << 5,
91	MLX4_IB_RX_HASH_SRC_PORT_UDP	= 1 << 6,
92	MLX4_IB_RX_HASH_DST_PORT_UDP	= 1 << 7,
93	MLX4_IB_RX_HASH_INNER		= 1ULL << 31,
94};
95struct mlx4_ib_rss_caps {
96	__aligned_u64 rx_hash_fields_mask;
97	__u8 rx_hash_function;
98	__u8 reserved[7];
99};
100enum query_device_resp_mask {
101	MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
102};
103struct mlx4_ib_tso_caps {
104	__u32 max_tso;
105
106	__u32 supported_qpts;
107};
108struct mlx4_uverbs_ex_query_device_resp {
109	__u32			comp_mask;
110	__u32			response_length;
111	__aligned_u64		hca_core_clock_offset;
112	__u32			max_inl_recv_sz;
113	__u32			reserved;
114	struct mlx4_ib_rss_caps	rss_caps;
115	struct mlx4_ib_tso_caps tso_caps;
116};
117#endif
118