1/* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6#ifndef __MGA_DRM_H__ 7#define __MGA_DRM_H__ 8#include "drm.h" 9#if defined(__cplusplus) 10extern "C" { 11#endif 12#ifndef __MGA_SAREA_DEFINES__ 13#define __MGA_SAREA_DEFINES__ 14#define MGA_F 0x1 15#define MGA_A 0x2 16#define MGA_S 0x4 17#define MGA_T2 0x8 18#define MGA_WARP_TGZ 0 19#define MGA_WARP_TGZF (MGA_F) 20#define MGA_WARP_TGZA (MGA_A) 21#define MGA_WARP_TGZAF (MGA_F|MGA_A) 22#define MGA_WARP_TGZS (MGA_S) 23#define MGA_WARP_TGZSF (MGA_S|MGA_F) 24#define MGA_WARP_TGZSA (MGA_S|MGA_A) 25#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) 26#define MGA_WARP_T2GZ (MGA_T2) 27#define MGA_WARP_T2GZF (MGA_T2|MGA_F) 28#define MGA_WARP_T2GZA (MGA_T2|MGA_A) 29#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) 30#define MGA_WARP_T2GZS (MGA_T2|MGA_S) 31#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) 32#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) 33#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) 34#define MGA_MAX_G200_PIPES 8 35#define MGA_MAX_G400_PIPES 16 36#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES 37#define MGA_WARP_UCODE_SIZE 32768 38#define MGA_CARD_TYPE_G200 1 39#define MGA_CARD_TYPE_G400 2 40#define MGA_CARD_TYPE_G450 3 41#define MGA_CARD_TYPE_G550 4 42#define MGA_FRONT 0x1 43#define MGA_BACK 0x2 44#define MGA_DEPTH 0x4 45#define MGA_UPLOAD_CONTEXT 0x1 46#define MGA_UPLOAD_TEX0 0x2 47#define MGA_UPLOAD_TEX1 0x4 48#define MGA_UPLOAD_PIPE 0x8 49#define MGA_UPLOAD_TEX0IMAGE 0x10 50#define MGA_UPLOAD_TEX1IMAGE 0x20 51#define MGA_UPLOAD_2D 0x40 52#define MGA_WAIT_AGE 0x80 53#define MGA_UPLOAD_CLIPRECTS 0x100 54#if 0 55#define MGA_DMA_FLUSH 0x200 56#endif 57#define MGA_BUFFER_SIZE (1 << 16) 58#define MGA_NUM_BUFFERS 128 59#define MGA_NR_SAREA_CLIPRECTS 8 60#define MGA_CARD_HEAP 0 61#define MGA_AGP_HEAP 1 62#define MGA_NR_TEX_HEAPS 2 63#define MGA_NR_TEX_REGIONS 16 64#define MGA_LOG_MIN_TEX_REGION_SIZE 16 65#define DRM_MGA_IDLE_RETRY 2048 66#endif 67typedef struct { 68 unsigned int dstorg; 69 unsigned int maccess; 70 unsigned int plnwt; 71 unsigned int dwgctl; 72 unsigned int alphactrl; 73 unsigned int fogcolor; 74 unsigned int wflag; 75 unsigned int tdualstage0; 76 unsigned int tdualstage1; 77 unsigned int fcol; 78 unsigned int stencil; 79 unsigned int stencilctl; 80} drm_mga_context_regs_t; 81typedef struct { 82 unsigned int pitch; 83} drm_mga_server_regs_t; 84typedef struct { 85 unsigned int texctl; 86 unsigned int texctl2; 87 unsigned int texfilter; 88 unsigned int texbordercol; 89 unsigned int texorg; 90 unsigned int texwidth; 91 unsigned int texheight; 92 unsigned int texorg1; 93 unsigned int texorg2; 94 unsigned int texorg3; 95 unsigned int texorg4; 96} drm_mga_texture_regs_t; 97typedef struct { 98 unsigned int head; 99 unsigned int wrap; 100} drm_mga_age_t; 101typedef struct _drm_mga_sarea { 102 103 drm_mga_context_regs_t context_state; 104 drm_mga_server_regs_t server_state; 105 drm_mga_texture_regs_t tex_state[2]; 106 unsigned int warp_pipe; 107 unsigned int dirty; 108 unsigned int vertsize; 109 110 struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS]; 111 unsigned int nbox; 112 113 unsigned int req_drawable; 114 unsigned int req_draw_buffer; 115 unsigned int exported_drawable; 116 unsigned int exported_index; 117 unsigned int exported_stamp; 118 unsigned int exported_buffers; 119 unsigned int exported_nfront; 120 unsigned int exported_nback; 121 int exported_back_x, exported_front_x, exported_w; 122 int exported_back_y, exported_front_y, exported_h; 123 struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS]; 124 125 unsigned int status[4]; 126 unsigned int last_wrap; 127 drm_mga_age_t last_frame; 128 unsigned int last_enqueue; 129 unsigned int last_dispatch; 130 unsigned int last_quiescent; 131 132 struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; 133 unsigned int texAge[MGA_NR_TEX_HEAPS]; 134 135 int ctxOwner; 136} drm_mga_sarea_t; 137#define DRM_MGA_INIT 0x00 138#define DRM_MGA_FLUSH 0x01 139#define DRM_MGA_RESET 0x02 140#define DRM_MGA_SWAP 0x03 141#define DRM_MGA_CLEAR 0x04 142#define DRM_MGA_VERTEX 0x05 143#define DRM_MGA_INDICES 0x06 144#define DRM_MGA_ILOAD 0x07 145#define DRM_MGA_BLIT 0x08 146#define DRM_MGA_GETPARAM 0x09 147#define DRM_MGA_SET_FENCE 0x0a 148#define DRM_MGA_WAIT_FENCE 0x0b 149#define DRM_MGA_DMA_BOOTSTRAP 0x0c 150#define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) 151#define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock) 152#define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) 153#define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP) 154#define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) 155#define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) 156#define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) 157#define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) 158#define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) 159#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) 160#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32) 161#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32) 162#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) 163typedef struct _drm_mga_warp_index { 164 int installed; 165 unsigned long phys_addr; 166 int size; 167} drm_mga_warp_index_t; 168typedef struct drm_mga_init { 169 enum { 170 MGA_INIT_DMA = 0x01, 171 MGA_CLEANUP_DMA = 0x02 172 } func; 173 unsigned long sarea_priv_offset; 174 int chipset; 175 int sgram; 176 unsigned int maccess; 177 unsigned int fb_cpp; 178 unsigned int front_offset, front_pitch; 179 unsigned int back_offset, back_pitch; 180 unsigned int depth_cpp; 181 unsigned int depth_offset, depth_pitch; 182 unsigned int texture_offset[MGA_NR_TEX_HEAPS]; 183 unsigned int texture_size[MGA_NR_TEX_HEAPS]; 184 unsigned long fb_offset; 185 unsigned long mmio_offset; 186 unsigned long status_offset; 187 unsigned long warp_offset; 188 unsigned long primary_offset; 189 unsigned long buffers_offset; 190} drm_mga_init_t; 191typedef struct drm_mga_dma_bootstrap { 192 193 194 unsigned long texture_handle; 195 __u32 texture_size; 196 197 198 __u32 primary_size; 199 200 __u32 secondary_bin_count; 201 202 __u32 secondary_bin_size; 203 204 __u32 agp_mode; 205 206 __u8 agp_size; 207} drm_mga_dma_bootstrap_t; 208typedef struct drm_mga_clear { 209 unsigned int flags; 210 unsigned int clear_color; 211 unsigned int clear_depth; 212 unsigned int color_mask; 213 unsigned int depth_mask; 214} drm_mga_clear_t; 215typedef struct drm_mga_vertex { 216 int idx; 217 int used; 218 int discard; 219} drm_mga_vertex_t; 220typedef struct drm_mga_indices { 221 int idx; 222 unsigned int start; 223 unsigned int end; 224 int discard; 225} drm_mga_indices_t; 226typedef struct drm_mga_iload { 227 int idx; 228 unsigned int dstorg; 229 unsigned int length; 230} drm_mga_iload_t; 231typedef struct _drm_mga_blit { 232 unsigned int planemask; 233 unsigned int srcorg; 234 unsigned int dstorg; 235 int src_pitch, dst_pitch; 236 int delta_sx, delta_sy; 237 int delta_dx, delta_dy; 238 int height, ydir; 239 int source_pitch, dest_pitch; 240} drm_mga_blit_t; 241#define MGA_PARAM_IRQ_NR 1 242#define MGA_PARAM_CARD_TYPE 2 243typedef struct drm_mga_getparam { 244 int param; 245 void __user *value; 246} drm_mga_getparam_t; 247#if defined(__cplusplus) 248} 249#endif 250#endif 251