1/* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6#ifndef _I810_DRM_H_ 7#define _I810_DRM_H_ 8#include "drm.h" 9#if defined(__cplusplus) 10extern "C" { 11#endif 12#ifndef _I810_DEFINES_ 13#define _I810_DEFINES_ 14#define I810_DMA_BUF_ORDER 12 15#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) 16#define I810_DMA_BUF_NR 256 17#define I810_NR_SAREA_CLIPRECTS 8 18#define I810_NR_TEX_REGIONS 64 19#define I810_LOG_MIN_TEX_REGION_SIZE 16 20#endif 21#define I810_UPLOAD_TEX0IMAGE 0x1 22#define I810_UPLOAD_TEX1IMAGE 0x2 23#define I810_UPLOAD_CTX 0x4 24#define I810_UPLOAD_BUFFERS 0x8 25#define I810_UPLOAD_TEX0 0x10 26#define I810_UPLOAD_TEX1 0x20 27#define I810_UPLOAD_CLIPRECTS 0x40 28#define I810_DESTREG_DI0 0 29#define I810_DESTREG_DI1 1 30#define I810_DESTREG_DV0 2 31#define I810_DESTREG_DV1 3 32#define I810_DESTREG_DR0 4 33#define I810_DESTREG_DR1 5 34#define I810_DESTREG_DR2 6 35#define I810_DESTREG_DR3 7 36#define I810_DESTREG_DR4 8 37#define I810_DEST_SETUP_SIZE 10 38#define I810_CTXREG_CF0 0 39#define I810_CTXREG_CF1 1 40#define I810_CTXREG_ST0 2 41#define I810_CTXREG_ST1 3 42#define I810_CTXREG_VF 4 43#define I810_CTXREG_MT 5 44#define I810_CTXREG_MC0 6 45#define I810_CTXREG_MC1 7 46#define I810_CTXREG_MC2 8 47#define I810_CTXREG_MA0 9 48#define I810_CTXREG_MA1 10 49#define I810_CTXREG_MA2 11 50#define I810_CTXREG_SDM 12 51#define I810_CTXREG_FOG 13 52#define I810_CTXREG_B1 14 53#define I810_CTXREG_B2 15 54#define I810_CTXREG_LCS 16 55#define I810_CTXREG_PV 17 56#define I810_CTXREG_ZA 18 57#define I810_CTXREG_AA 19 58#define I810_CTX_SETUP_SIZE 20 59#define I810_TEXREG_MI0 0 60#define I810_TEXREG_MI1 1 61#define I810_TEXREG_MI2 2 62#define I810_TEXREG_MI3 3 63#define I810_TEXREG_MF 4 64#define I810_TEXREG_MLC 5 65#define I810_TEXREG_MLL 6 66#define I810_TEXREG_MCS 7 67#define I810_TEX_SETUP_SIZE 8 68#define I810_FRONT 0x1 69#define I810_BACK 0x2 70#define I810_DEPTH 0x4 71typedef enum _drm_i810_init_func { 72 I810_INIT_DMA = 0x01, 73 I810_CLEANUP_DMA = 0x02, 74 I810_INIT_DMA_1_4 = 0x03 75} drm_i810_init_func_t; 76typedef struct _drm_i810_init { 77 drm_i810_init_func_t func; 78 unsigned int mmio_offset; 79 unsigned int buffers_offset; 80 int sarea_priv_offset; 81 unsigned int ring_start; 82 unsigned int ring_end; 83 unsigned int ring_size; 84 unsigned int front_offset; 85 unsigned int back_offset; 86 unsigned int depth_offset; 87 unsigned int overlay_offset; 88 unsigned int overlay_physical; 89 unsigned int w; 90 unsigned int h; 91 unsigned int pitch; 92 unsigned int pitch_bits; 93} drm_i810_init_t; 94typedef struct _drm_i810_pre12_init { 95 drm_i810_init_func_t func; 96 unsigned int mmio_offset; 97 unsigned int buffers_offset; 98 int sarea_priv_offset; 99 unsigned int ring_start; 100 unsigned int ring_end; 101 unsigned int ring_size; 102 unsigned int front_offset; 103 unsigned int back_offset; 104 unsigned int depth_offset; 105 unsigned int w; 106 unsigned int h; 107 unsigned int pitch; 108 unsigned int pitch_bits; 109} drm_i810_pre12_init_t; 110typedef struct _drm_i810_tex_region { 111 unsigned char next, prev; 112 unsigned char in_use; 113 int age; 114} drm_i810_tex_region_t; 115typedef struct _drm_i810_sarea { 116 unsigned int ContextState[I810_CTX_SETUP_SIZE]; 117 unsigned int BufferState[I810_DEST_SETUP_SIZE]; 118 unsigned int TexState[2][I810_TEX_SETUP_SIZE]; 119 unsigned int dirty; 120 unsigned int nbox; 121 struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS]; 122 123 drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1]; 124 125 int texAge; 126 int last_enqueue; 127 int last_dispatch; 128 int last_quiescent; 129 int ctxOwner; 130 int vertex_prim; 131 int pf_enabled; 132 int pf_active; 133 int pf_current_page; 134} drm_i810_sarea_t; 135#define DRM_I810_INIT 0x00 136#define DRM_I810_VERTEX 0x01 137#define DRM_I810_CLEAR 0x02 138#define DRM_I810_FLUSH 0x03 139#define DRM_I810_GETAGE 0x04 140#define DRM_I810_GETBUF 0x05 141#define DRM_I810_SWAP 0x06 142#define DRM_I810_COPY 0x07 143#define DRM_I810_DOCOPY 0x08 144#define DRM_I810_OV0INFO 0x09 145#define DRM_I810_FSTATUS 0x0a 146#define DRM_I810_OV0FLIP 0x0b 147#define DRM_I810_MC 0x0c 148#define DRM_I810_RSTATUS 0x0d 149#define DRM_I810_FLIP 0x0e 150#define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t) 151#define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t) 152#define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t) 153#define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH) 154#define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE) 155#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t) 156#define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP) 157#define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t) 158#define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY) 159#define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t) 160#define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS) 161#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP) 162#define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t) 163#define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS) 164#define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP) 165typedef struct _drm_i810_clear { 166 int clear_color; 167 int clear_depth; 168 int flags; 169} drm_i810_clear_t; 170typedef struct _drm_i810_vertex { 171 int idx; 172 int used; 173 int discard; 174} drm_i810_vertex_t; 175typedef struct _drm_i810_copy_t { 176 int idx; 177 int used; 178 void *address; 179} drm_i810_copy_t; 180#define PR_TRIANGLES (0x0<<18) 181#define PR_TRISTRIP_0 (0x1<<18) 182#define PR_TRISTRIP_1 (0x2<<18) 183#define PR_TRIFAN (0x3<<18) 184#define PR_POLYGON (0x4<<18) 185#define PR_LINES (0x5<<18) 186#define PR_LINESTRIP (0x6<<18) 187#define PR_RECTS (0x7<<18) 188#define PR_MASK (0x7<<18) 189typedef struct drm_i810_dma { 190 void * __linux_virtual; 191 int request_idx; 192 int request_size; 193 int granted; 194} drm_i810_dma_t; 195typedef struct _drm_i810_overlay_t { 196 unsigned int offset; 197 unsigned int physical; 198} drm_i810_overlay_t; 199typedef struct _drm_i810_mc { 200 int idx; 201 int used; 202 int num_blocks; 203 int *length; 204 unsigned int last_render; 205} drm_i810_mc_t; 206#if defined(__cplusplus) 207} 208#endif 209#endif 210