1/* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6#ifndef _UAPI_EXYNOS_DRM_H_ 7#define _UAPI_EXYNOS_DRM_H_ 8#include "drm.h" 9#if defined(__cplusplus) 10extern "C" { 11#endif 12struct drm_exynos_gem_create { 13 __u64 size; 14 __u32 flags; 15 __u32 handle; 16}; 17struct drm_exynos_gem_map { 18 __u32 handle; 19 __u32 reserved; 20 __u64 offset; 21}; 22struct drm_exynos_gem_info { 23 __u32 handle; 24 __u32 flags; 25 __u64 size; 26}; 27struct drm_exynos_vidi_connection { 28 __u32 connection; 29 __u32 extensions; 30 __u64 edid; 31}; 32enum e_drm_exynos_gem_mem_type { 33 34 EXYNOS_BO_CONTIG = 0 << 0, 35 36 EXYNOS_BO_NONCONTIG = 1 << 0, 37 38 EXYNOS_BO_NONCACHABLE = 0 << 1, 39 40 EXYNOS_BO_CACHABLE = 1 << 1, 41 42 EXYNOS_BO_WC = 1 << 2, 43 EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE | 44 EXYNOS_BO_WC 45}; 46struct drm_exynos_g2d_get_ver { 47 __u32 major; 48 __u32 minor; 49}; 50struct drm_exynos_g2d_cmd { 51 __u32 offset; 52 __u32 data; 53}; 54enum drm_exynos_g2d_buf_type { 55 G2D_BUF_USERPTR = 1 << 31, 56}; 57enum drm_exynos_g2d_event_type { 58 G2D_EVENT_NOT, 59 G2D_EVENT_NONSTOP, 60 G2D_EVENT_STOP, 61}; 62struct drm_exynos_g2d_userptr { 63 unsigned long userptr; 64 unsigned long size; 65}; 66struct drm_exynos_g2d_set_cmdlist { 67 __u64 cmd; 68 __u64 cmd_buf; 69 __u32 cmd_nr; 70 __u32 cmd_buf_nr; 71 72 __u64 event_type; 73 __u64 user_data; 74}; 75struct drm_exynos_g2d_exec { 76 __u64 async; 77}; 78struct drm_exynos_ioctl_ipp_get_res { 79 __u32 count_ipps; 80 __u32 reserved; 81 __u64 ipp_id_ptr; 82}; 83enum drm_exynos_ipp_format_type { 84 DRM_EXYNOS_IPP_FORMAT_SOURCE = 0x01, 85 DRM_EXYNOS_IPP_FORMAT_DESTINATION = 0x02, 86}; 87struct drm_exynos_ipp_format { 88 __u32 fourcc; 89 __u32 type; 90 __u64 modifier; 91}; 92enum drm_exynos_ipp_capability { 93 DRM_EXYNOS_IPP_CAP_CROP = 0x01, 94 DRM_EXYNOS_IPP_CAP_ROTATE = 0x02, 95 DRM_EXYNOS_IPP_CAP_SCALE = 0x04, 96 DRM_EXYNOS_IPP_CAP_CONVERT = 0x08, 97}; 98struct drm_exynos_ioctl_ipp_get_caps { 99 __u32 ipp_id; 100 __u32 capabilities; 101 __u32 reserved; 102 __u32 formats_count; 103 __u64 formats_ptr; 104}; 105enum drm_exynos_ipp_limit_type { 106 107 DRM_EXYNOS_IPP_LIMIT_TYPE_SIZE = 0x0001, 108 109 DRM_EXYNOS_IPP_LIMIT_TYPE_SCALE = 0x0002, 110 111 DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER = 0x0001 << 16, 112 113 DRM_EXYNOS_IPP_LIMIT_SIZE_AREA = 0x0002 << 16, 114 115 DRM_EXYNOS_IPP_LIMIT_SIZE_ROTATED = 0x0003 << 16, 116 DRM_EXYNOS_IPP_LIMIT_TYPE_MASK = 0x000f, 117 DRM_EXYNOS_IPP_LIMIT_SIZE_MASK = 0x000f << 16, 118}; 119struct drm_exynos_ipp_limit_val { 120 __u32 min; 121 __u32 max; 122 __u32 align; 123 __u32 reserved; 124}; 125struct drm_exynos_ipp_limit { 126 __u32 type; 127 __u32 reserved; 128 struct drm_exynos_ipp_limit_val h; 129 struct drm_exynos_ipp_limit_val v; 130}; 131struct drm_exynos_ioctl_ipp_get_limits { 132 __u32 ipp_id; 133 __u32 fourcc; 134 __u64 modifier; 135 __u32 type; 136 __u32 limits_count; 137 __u64 limits_ptr; 138}; 139enum drm_exynos_ipp_task_id { 140 141 DRM_EXYNOS_IPP_TASK_BUFFER = 0x0001, 142 143 DRM_EXYNOS_IPP_TASK_RECTANGLE = 0x0002, 144 145 DRM_EXYNOS_IPP_TASK_TRANSFORM = 0x0003, 146 147 DRM_EXYNOS_IPP_TASK_ALPHA = 0x0004, 148 149 DRM_EXYNOS_IPP_TASK_TYPE_SOURCE = 0x0001 << 16, 150 151 DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION = 0x0002 << 16, 152}; 153struct drm_exynos_ipp_task_buffer { 154 __u32 id; 155 __u32 fourcc; 156 __u32 width, height; 157 __u32 gem_id[4]; 158 __u32 offset[4]; 159 __u32 pitch[4]; 160 __u64 modifier; 161}; 162struct drm_exynos_ipp_task_rect { 163 __u32 id; 164 __u32 reserved; 165 __u32 x; 166 __u32 y; 167 __u32 w; 168 __u32 h; 169}; 170struct drm_exynos_ipp_task_transform { 171 __u32 id; 172 __u32 rotation; 173}; 174struct drm_exynos_ipp_task_alpha { 175 __u32 id; 176 __u32 value; 177}; 178enum drm_exynos_ipp_flag { 179 180 DRM_EXYNOS_IPP_FLAG_EVENT = 0x01, 181 182 DRM_EXYNOS_IPP_FLAG_TEST_ONLY = 0x02, 183 184 DRM_EXYNOS_IPP_FLAG_NONBLOCK = 0x04, 185}; 186#define DRM_EXYNOS_IPP_FLAGS (DRM_EXYNOS_IPP_FLAG_EVENT |\ 187 DRM_EXYNOS_IPP_FLAG_TEST_ONLY | DRM_EXYNOS_IPP_FLAG_NONBLOCK) 188struct drm_exynos_ioctl_ipp_commit { 189 __u32 ipp_id; 190 __u32 flags; 191 __u32 reserved; 192 __u32 params_size; 193 __u64 params_ptr; 194 __u64 user_data; 195}; 196#define DRM_EXYNOS_GEM_CREATE 0x00 197#define DRM_EXYNOS_GEM_MAP 0x01 198#define DRM_EXYNOS_GEM_GET 0x04 199#define DRM_EXYNOS_VIDI_CONNECTION 0x07 200#define DRM_EXYNOS_G2D_GET_VER 0x20 201#define DRM_EXYNOS_G2D_SET_CMDLIST 0x21 202#define DRM_EXYNOS_G2D_EXEC 0x22 203#define DRM_EXYNOS_IPP_GET_RESOURCES 0x40 204#define DRM_EXYNOS_IPP_GET_CAPS 0x41 205#define DRM_EXYNOS_IPP_GET_LIMITS 0x42 206#define DRM_EXYNOS_IPP_COMMIT 0x43 207#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ 208 DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create) 209#define DRM_IOCTL_EXYNOS_GEM_MAP DRM_IOWR(DRM_COMMAND_BASE + \ 210 DRM_EXYNOS_GEM_MAP, struct drm_exynos_gem_map) 211#define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \ 212 DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info) 213#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \ 214 DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection) 215#define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \ 216 DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver) 217#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \ 218 DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist) 219#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \ 220 DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec) 221#define DRM_IOCTL_EXYNOS_IPP_GET_RESOURCES DRM_IOWR(DRM_COMMAND_BASE + \ 222 DRM_EXYNOS_IPP_GET_RESOURCES, \ 223 struct drm_exynos_ioctl_ipp_get_res) 224#define DRM_IOCTL_EXYNOS_IPP_GET_CAPS DRM_IOWR(DRM_COMMAND_BASE + \ 225 DRM_EXYNOS_IPP_GET_CAPS, struct drm_exynos_ioctl_ipp_get_caps) 226#define DRM_IOCTL_EXYNOS_IPP_GET_LIMITS DRM_IOWR(DRM_COMMAND_BASE + \ 227 DRM_EXYNOS_IPP_GET_LIMITS, \ 228 struct drm_exynos_ioctl_ipp_get_limits) 229#define DRM_IOCTL_EXYNOS_IPP_COMMIT DRM_IOWR(DRM_COMMAND_BASE + \ 230 DRM_EXYNOS_IPP_COMMIT, struct drm_exynos_ioctl_ipp_commit) 231#define DRM_EXYNOS_G2D_EVENT 0x80000000 232#define DRM_EXYNOS_IPP_EVENT 0x80000002 233struct drm_exynos_g2d_event { 234 struct drm_event base; 235 __u64 user_data; 236 __u32 tv_sec; 237 __u32 tv_usec; 238 __u32 cmdlist_no; 239 __u32 reserved; 240}; 241struct drm_exynos_ipp_event { 242 struct drm_event base; 243 __u64 user_data; 244 __u32 tv_sec; 245 __u32 tv_usec; 246 __u32 ipp_id; 247 __u32 sequence; 248 __u64 reserved; 249}; 250#if defined(__cplusplus) 251} 252#endif 253#endif 254