162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * HiSilicon PCIe Trace and Tuning (PTT) support 462306a36Sopenharmony_ci * Copyright (c) 2022 HiSilicon Technologies Co., Ltd. 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#ifndef INCLUDE__HISI_PTT_PKT_DECODER_H__ 862306a36Sopenharmony_ci#define INCLUDE__HISI_PTT_PKT_DECODER_H__ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#include <stddef.h> 1162306a36Sopenharmony_ci#include <stdint.h> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#define HISI_PTT_8DW_CHECK_MASK GENMASK(31, 11) 1462306a36Sopenharmony_ci#define HISI_PTT_IS_8DW_PKT GENMASK(31, 11) 1562306a36Sopenharmony_ci#define HISI_PTT_MAX_SPACE_LEN 10 1662306a36Sopenharmony_ci#define HISI_PTT_FIELD_LENTH 4 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_cienum hisi_ptt_pkt_type { 1962306a36Sopenharmony_ci HISI_PTT_4DW_PKT, 2062306a36Sopenharmony_ci HISI_PTT_8DW_PKT, 2162306a36Sopenharmony_ci HISI_PTT_PKT_MAX 2262306a36Sopenharmony_ci}; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_cistatic int hisi_ptt_pkt_size[] = { 2562306a36Sopenharmony_ci [HISI_PTT_4DW_PKT] = 16, 2662306a36Sopenharmony_ci [HISI_PTT_8DW_PKT] = 32, 2762306a36Sopenharmony_ci}; 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ciint hisi_ptt_pkt_desc(const unsigned char *buf, int pos, enum hisi_ptt_pkt_type type); 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci#endif 32