162306a36Sopenharmony_ciC ISA2+pooncerelease+poacquirerelease+poacquireonce
262306a36Sopenharmony_ci
362306a36Sopenharmony_ci(*
462306a36Sopenharmony_ci * Result: Never
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * This litmus test demonstrates that a release-acquire chain suffices
762306a36Sopenharmony_ci * to order P0()'s initial write against P2()'s final read.  The reason
862306a36Sopenharmony_ci * that the release-acquire chain suffices is because in all but one
962306a36Sopenharmony_ci * case (P2() to P0()), each process reads from the preceding process's
1062306a36Sopenharmony_ci * write.  In memory-model-speak, there is only one non-reads-from
1162306a36Sopenharmony_ci * (AKA non-rf) link, so release-acquire is all that is needed.
1262306a36Sopenharmony_ci *)
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci{}
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciP0(int *x, int *y)
1762306a36Sopenharmony_ci{
1862306a36Sopenharmony_ci	WRITE_ONCE(*x, 1);
1962306a36Sopenharmony_ci	smp_store_release(y, 1);
2062306a36Sopenharmony_ci}
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciP1(int *y, int *z)
2362306a36Sopenharmony_ci{
2462306a36Sopenharmony_ci	int r0;
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci	r0 = smp_load_acquire(y);
2762306a36Sopenharmony_ci	smp_store_release(z, 1);
2862306a36Sopenharmony_ci}
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ciP2(int *x, int *z)
3162306a36Sopenharmony_ci{
3262306a36Sopenharmony_ci	int r0;
3362306a36Sopenharmony_ci	int r1;
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci	r0 = smp_load_acquire(z);
3662306a36Sopenharmony_ci	r1 = READ_ONCE(*x);
3762306a36Sopenharmony_ci}
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ciexists (1:r0=1 /\ 2:r0=1 /\ 2:r1=0)
40