162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 262306a36Sopenharmony_ci// 362306a36Sopenharmony_ci// Copyright (c) 2021 Mediatek Corporation. All rights reserved. 462306a36Sopenharmony_ci// 562306a36Sopenharmony_ci// Author: YC Hung <yc.hung@mediatek.com> 662306a36Sopenharmony_ci// 762306a36Sopenharmony_ci// Hardware interface for mt8195 DSP code loader 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include <sound/sof.h> 1062306a36Sopenharmony_ci#include "mt8195.h" 1162306a36Sopenharmony_ci#include "../../ops.h" 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_civoid sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr) 1462306a36Sopenharmony_ci{ 1562306a36Sopenharmony_ci /* ADSP bootup base */ 1662306a36Sopenharmony_ci snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_ALTRESETVEC, boot_addr); 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci /* pull high RunStall (set bit3 to 1) */ 1962306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, 2062306a36Sopenharmony_ci ADSP_RUNSTALL, ADSP_RUNSTALL); 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci /* pull high StatVectorSel to use AltResetVec (set bit4 to 1) */ 2362306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, 2462306a36Sopenharmony_ci STATVECTOR_SEL, STATVECTOR_SEL); 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci /* toggle DReset & BReset */ 2762306a36Sopenharmony_ci /* pull high DReset & BReset */ 2862306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, 2962306a36Sopenharmony_ci ADSP_BRESET_SW | ADSP_DRESET_SW, 3062306a36Sopenharmony_ci ADSP_BRESET_SW | ADSP_DRESET_SW); 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci /* delay 10 DSP cycles at 26M about 1us by IP vendor's suggestion */ 3362306a36Sopenharmony_ci udelay(1); 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci /* pull low DReset & BReset */ 3662306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, 3762306a36Sopenharmony_ci ADSP_BRESET_SW | ADSP_DRESET_SW, 3862306a36Sopenharmony_ci 0); 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci /* Enable PDebug */ 4162306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_PDEBUGBUS0, 4262306a36Sopenharmony_ci PDEBUG_ENABLE, 4362306a36Sopenharmony_ci PDEBUG_ENABLE); 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci /* release RunStall (set bit3 to 0) */ 4662306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, 4762306a36Sopenharmony_ci ADSP_RUNSTALL, 0); 4862306a36Sopenharmony_ci} 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_civoid sof_hifixdsp_shutdown(struct snd_sof_dev *sdev) 5162306a36Sopenharmony_ci{ 5262306a36Sopenharmony_ci /* RUN_STALL pull high again to reset */ 5362306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, 5462306a36Sopenharmony_ci ADSP_RUNSTALL, ADSP_RUNSTALL); 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci /* pull high DReset & BReset */ 5762306a36Sopenharmony_ci snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, 5862306a36Sopenharmony_ci ADSP_BRESET_SW | ADSP_DRESET_SW, 5962306a36Sopenharmony_ci ADSP_BRESET_SW | ADSP_DRESET_SW); 6062306a36Sopenharmony_ci} 6162306a36Sopenharmony_ci 62