1/* SPDX-License-Identifier: GPL-2.0 */
2
3/*
4 * Copyright (c) 2021 MediaTek Corporation. All rights reserved.
5 *
6 *  Header file for the mt8195 DSP clock  definition
7 */
8
9#ifndef __MT8195_CLK_H
10#define __MT8195_CLK_H
11
12struct snd_sof_dev;
13
14/*DSP clock*/
15enum adsp_clk_id {
16	CLK_TOP_ADSP,
17	CLK_TOP_CLK26M,
18	CLK_TOP_AUDIO_LOCAL_BUS,
19	CLK_TOP_MAINPLL_D7_D2,
20	CLK_SCP_ADSP_AUDIODSP,
21	CLK_TOP_AUDIO_H,
22	ADSP_CLK_MAX
23};
24
25int mt8195_adsp_init_clock(struct snd_sof_dev *sdev);
26int adsp_clock_on(struct snd_sof_dev *sdev);
27int adsp_clock_off(struct snd_sof_dev *sdev);
28#endif
29