162306a36Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * This file is provided under a dual BSD/GPLv2 license. When using or 462306a36Sopenharmony_ci * redistributing this file, you may do so under either license. 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Copyright(c) 2019 Intel Corporation. All rights reserved. 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Author: Keyon Jie <yang.jie@linux.intel.com> 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#ifndef __SOF_INTEL_HDA_IPC_H 1262306a36Sopenharmony_ci#define __SOF_INTEL_HDA_IPC_H 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/* 1562306a36Sopenharmony_ci * Primary register, mapped to 1662306a36Sopenharmony_ci * - DIPCTDR (HIPCIDR) in sideband IPC (cAVS 1.8+) 1762306a36Sopenharmony_ci * - DIPCT in cAVS 1.5 IPC 1862306a36Sopenharmony_ci * 1962306a36Sopenharmony_ci * Secondary register, mapped to: 2062306a36Sopenharmony_ci * - DIPCTDD (HIPCIDD) in sideband IPC (cAVS 1.8+) 2162306a36Sopenharmony_ci * - DIPCTE in cAVS 1.5 IPC 2262306a36Sopenharmony_ci */ 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci/* Common bits in primary register */ 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci/* Reserved for doorbell */ 2762306a36Sopenharmony_ci#define HDA_IPC_RSVD_31 BIT(31) 2862306a36Sopenharmony_ci/* Target, 0 - normal message, 1 - compact message(cAVS compatible) */ 2962306a36Sopenharmony_ci#define HDA_IPC_MSG_COMPACT BIT(30) 3062306a36Sopenharmony_ci/* Direction, 0 - request, 1 - response */ 3162306a36Sopenharmony_ci#define HDA_IPC_RSP BIT(29) 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci#define HDA_IPC_TYPE_SHIFT 24 3462306a36Sopenharmony_ci#define HDA_IPC_TYPE_MASK GENMASK(28, 24) 3562306a36Sopenharmony_ci#define HDA_IPC_TYPE(x) ((x) << HDA_IPC_TYPE_SHIFT) 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci#define HDA_IPC_PM_GATE HDA_IPC_TYPE(0x8U) 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci/* Command specific payload bits in secondary register */ 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci/* Disable DMA tracing (0 - keep tracing, 1 - to disable DMA trace) */ 4262306a36Sopenharmony_ci#define HDA_PM_NO_DMA_TRACE BIT(4) 4362306a36Sopenharmony_ci/* Prevent clock gating (0 - cg allowed, 1 - DSP clock always on) */ 4462306a36Sopenharmony_ci#define HDA_PM_PCG BIT(3) 4562306a36Sopenharmony_ci/* Prevent power gating (0 - deep power state transitions allowed) */ 4662306a36Sopenharmony_ci#define HDA_PM_PPG BIT(2) 4762306a36Sopenharmony_ci/* Indicates whether streaming is active */ 4862306a36Sopenharmony_ci#define HDA_PM_PG_STREAMING BIT(1) 4962306a36Sopenharmony_ci#define HDA_PM_PG_RSVD BIT(0) 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ciirqreturn_t cnl_ipc_irq_thread(int irq, void *context); 5262306a36Sopenharmony_ciint cnl_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg); 5362306a36Sopenharmony_civoid cnl_ipc_dump(struct snd_sof_dev *sdev); 5462306a36Sopenharmony_civoid cnl_ipc4_dump(struct snd_sof_dev *sdev); 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci#endif 57