1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2020, Linaro Limited
3
4#include <linux/err.h>
5#include <linux/init.h>
6#include <linux/clk-provider.h>
7#include <linux/module.h>
8#include <linux/device.h>
9#include <linux/platform_device.h>
10#include "q6dsp-lpass-clocks.h"
11#include "q6afe.h"
12
13#define Q6AFE_CLK(id) {					\
14		.clk_id	= id,				\
15		.q6dsp_clk_id	= Q6AFE_##id,		\
16		.name = #id,				\
17		.rate = 19200000,			\
18	}
19
20
21static const struct q6dsp_clk_init q6afe_clks[] = {
22	Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT),
23	Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT),
24	Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT),
25	Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT),
26	Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_IBIT),
27	Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_EBIT),
28	Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT),
29	Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT),
30	Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT),
31	Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT),
32	Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR),
33	Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT),
34	Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT),
35	Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT),
36	Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT),
37	Q6AFE_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT),
38	Q6AFE_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT),
39	Q6AFE_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT),
40	Q6AFE_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT),
41	Q6AFE_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT),
42	Q6AFE_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT),
43	Q6AFE_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT),
44	Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_OSR),
45	Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_IBIT),
46	Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_EBIT),
47	Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_IBIT),
48	Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_EBIT),
49	Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_IBIT),
50	Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_EBIT),
51	Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_IBIT),
52	Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_EBIT),
53	Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_IBIT),
54	Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_EBIT),
55	Q6AFE_CLK(LPASS_CLK_ID_QUI_PCM_OSR),
56	Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_IBIT),
57	Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_EBIT),
58	Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_IBIT),
59	Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_EBIT),
60	Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_IBIT),
61	Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_EBIT),
62	Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_IBIT),
63	Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_EBIT),
64	Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_IBIT),
65	Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_EBIT),
66	Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_OSR),
67	Q6AFE_CLK(LPASS_CLK_ID_MCLK_1),
68	Q6AFE_CLK(LPASS_CLK_ID_MCLK_2),
69	Q6AFE_CLK(LPASS_CLK_ID_MCLK_3),
70	Q6AFE_CLK(LPASS_CLK_ID_MCLK_4),
71	Q6AFE_CLK(LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE),
72	Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_0),
73	Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_1),
74	Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
75	Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
76	Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
77	Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_MCLK),
78	Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK),
79	Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
80	Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
81	Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
82	Q6DSP_VOTE_CLK(LPASS_HW_AVTIMER_VOTE,
83		       Q6AFE_LPASS_CORE_AVTIMER_BLOCK,
84		       "LPASS_AVTIMER_MACRO"),
85	Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE,
86		       Q6AFE_LPASS_CORE_HW_MACRO_BLOCK,
87		       "LPASS_HW_MACRO"),
88	Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE,
89		       Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK,
90		       "LPASS_HW_DCODEC"),
91};
92
93static const struct q6dsp_clk_desc q6dsp_clk_q6afe __maybe_unused = {
94	.clks = q6afe_clks,
95	.num_clks = ARRAY_SIZE(q6afe_clks),
96	.lpass_set_clk = q6afe_set_lpass_clock,
97	.lpass_vote_clk = q6afe_vote_lpass_core_hw,
98	.lpass_unvote_clk = q6afe_unvote_lpass_core_hw,
99};
100
101#ifdef CONFIG_OF
102static const struct of_device_id q6afe_clock_device_id[] = {
103	{ .compatible = "qcom,q6afe-clocks", .data = &q6dsp_clk_q6afe },
104	{},
105};
106MODULE_DEVICE_TABLE(of, q6afe_clock_device_id);
107#endif
108
109static struct platform_driver q6afe_clock_platform_driver = {
110	.driver = {
111		.name = "q6afe-clock",
112		.of_match_table = of_match_ptr(q6afe_clock_device_id),
113	},
114	.probe = q6dsp_clock_dev_probe,
115};
116module_platform_driver(q6afe_clock_platform_driver);
117
118MODULE_DESCRIPTION("Q6 Audio Frontend clock driver");
119MODULE_LICENSE("GPL v2");
120