1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * mt8188-audsys-clk.h  --  MediaTek 8188 audsys clock definition
4 *
5 * Copyright (c) 2022 MediaTek Inc.
6 * Author: Chun-Chia Chiu <chun-chia.chiu@mediatek.com>
7 */
8
9#ifndef _MT8188_AUDSYS_CLK_H_
10#define _MT8188_AUDSYS_CLK_H_
11
12int mt8188_audsys_clk_register(struct mtk_base_afe *afe);
13
14#endif
15