162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci *
362306a36Sopenharmony_ci * mt8186-audsys-clkid.h  --  Mediatek 8186 audsys clock id definition
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (c) 2022 MediaTek Inc.
662306a36Sopenharmony_ci * Author: Jiaxin Yu <jiaxin.yu@mediatek.com>
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#ifndef _MT8186_AUDSYS_CLKID_H_
1062306a36Sopenharmony_ci#define _MT8186_AUDSYS_CLKID_H_
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cienum{
1362306a36Sopenharmony_ci	CLK_AUD_AFE,
1462306a36Sopenharmony_ci	CLK_AUD_22M,
1562306a36Sopenharmony_ci	CLK_AUD_24M,
1662306a36Sopenharmony_ci	CLK_AUD_APLL2_TUNER,
1762306a36Sopenharmony_ci	CLK_AUD_APLL_TUNER,
1862306a36Sopenharmony_ci	CLK_AUD_TDM,
1962306a36Sopenharmony_ci	CLK_AUD_ADC,
2062306a36Sopenharmony_ci	CLK_AUD_DAC,
2162306a36Sopenharmony_ci	CLK_AUD_DAC_PREDIS,
2262306a36Sopenharmony_ci	CLK_AUD_TML,
2362306a36Sopenharmony_ci	CLK_AUD_NLE,
2462306a36Sopenharmony_ci	CLK_AUD_I2S1_BCLK,
2562306a36Sopenharmony_ci	CLK_AUD_I2S2_BCLK,
2662306a36Sopenharmony_ci	CLK_AUD_I2S3_BCLK,
2762306a36Sopenharmony_ci	CLK_AUD_I2S4_BCLK,
2862306a36Sopenharmony_ci	CLK_AUD_CONNSYS_I2S_ASRC,
2962306a36Sopenharmony_ci	CLK_AUD_GENERAL1_ASRC,
3062306a36Sopenharmony_ci	CLK_AUD_GENERAL2_ASRC,
3162306a36Sopenharmony_ci	CLK_AUD_DAC_HIRES,
3262306a36Sopenharmony_ci	CLK_AUD_ADC_HIRES,
3362306a36Sopenharmony_ci	CLK_AUD_ADC_HIRES_TML,
3462306a36Sopenharmony_ci	CLK_AUD_ADDA6_ADC,
3562306a36Sopenharmony_ci	CLK_AUD_ADDA6_ADC_HIRES,
3662306a36Sopenharmony_ci	CLK_AUD_3RD_DAC,
3762306a36Sopenharmony_ci	CLK_AUD_3RD_DAC_PREDIS,
3862306a36Sopenharmony_ci	CLK_AUD_3RD_DAC_TML,
3962306a36Sopenharmony_ci	CLK_AUD_3RD_DAC_HIRES,
4062306a36Sopenharmony_ci	CLK_AUD_ETDM_IN1_BCLK,
4162306a36Sopenharmony_ci	CLK_AUD_ETDM_OUT1_BCLK,
4262306a36Sopenharmony_ci	CLK_AUD_NR_CLK,
4362306a36Sopenharmony_ci};
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci#endif
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