162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci *
362306a36Sopenharmony_ci * mt8186-audsys-clk.h  --  Mediatek 8186 audsys clock definition
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (c) 2022 MediaTek Inc.
662306a36Sopenharmony_ci * Author: Trevor Wu <trevor.wu@mediatek.com>
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#ifndef _MT8186_AUDSYS_CLK_H_
1062306a36Sopenharmony_ci#define _MT8186_AUDSYS_CLK_H_
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ciint mt8186_audsys_clk_register(struct mtk_base_afe *afe);
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci#endif
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