162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * ALSA I2S interface for the Loongson platform 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2023 Loongson Technology Corporation Limited 662306a36Sopenharmony_ci * Author: Yingkun Meng <mengyingkun@loongson.cn> 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#ifndef _LOONGSON_I2S_H 1062306a36Sopenharmony_ci#define _LOONGSON_I2S_H 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <linux/regmap.h> 1362306a36Sopenharmony_ci#include <sound/dmaengine_pcm.h> 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci/* I2S Common Registers */ 1662306a36Sopenharmony_ci#define LS_I2S_VER 0x00 /* I2S Version */ 1762306a36Sopenharmony_ci#define LS_I2S_CFG 0x04 /* I2S Config */ 1862306a36Sopenharmony_ci#define LS_I2S_CTRL 0x08 /* I2S Control */ 1962306a36Sopenharmony_ci#define LS_I2S_RX_DATA 0x0C /* I2S DMA RX Address */ 2062306a36Sopenharmony_ci#define LS_I2S_TX_DATA 0x10 /* I2S DMA TX Address */ 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci/* 2K2000 I2S Specify Registers */ 2362306a36Sopenharmony_ci#define LS_I2S_CFG1 0x14 /* I2S Config1 */ 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci/* 7A2000 I2S Specify Registers */ 2662306a36Sopenharmony_ci#define LS_I2S_TX_ORDER 0x100 /* TX DMA Order */ 2762306a36Sopenharmony_ci#define LS_I2S_RX_ORDER 0x110 /* RX DMA Order */ 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci/* Loongson I2S Control Register */ 3062306a36Sopenharmony_ci#define I2S_CTRL_MCLK_READY (1 << 16) /* MCLK ready */ 3162306a36Sopenharmony_ci#define I2S_CTRL_MASTER (1 << 15) /* Master mode */ 3262306a36Sopenharmony_ci#define I2S_CTRL_MSB (1 << 14) /* MSB bit order */ 3362306a36Sopenharmony_ci#define I2S_CTRL_RX_EN (1 << 13) /* RX enable */ 3462306a36Sopenharmony_ci#define I2S_CTRL_TX_EN (1 << 12) /* TX enable */ 3562306a36Sopenharmony_ci#define I2S_CTRL_RX_DMA_EN (1 << 11) /* DMA RX enable */ 3662306a36Sopenharmony_ci#define I2S_CTRL_CLK_READY (1 << 8) /* BCLK ready */ 3762306a36Sopenharmony_ci#define I2S_CTRL_TX_DMA_EN (1 << 7) /* DMA TX enable */ 3862306a36Sopenharmony_ci#define I2S_CTRL_RESET (1 << 4) /* Controller soft reset */ 3962306a36Sopenharmony_ci#define I2S_CTRL_MCLK_EN (1 << 3) /* Enable MCLK */ 4062306a36Sopenharmony_ci#define I2S_CTRL_RX_INT_EN (1 << 1) /* RX interrupt enable */ 4162306a36Sopenharmony_ci#define I2S_CTRL_TX_INT_EN (1 << 0) /* TX interrupt enable */ 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci#define LS_I2S_DRVNAME "loongson-i2s" 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_cistruct loongson_dma_data { 4662306a36Sopenharmony_ci dma_addr_t dev_addr; /* device physical address for DMA */ 4762306a36Sopenharmony_ci void __iomem *order_addr; /* DMA order register */ 4862306a36Sopenharmony_ci int irq; /* DMA irq */ 4962306a36Sopenharmony_ci}; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cistruct loongson_i2s { 5262306a36Sopenharmony_ci struct device *dev; 5362306a36Sopenharmony_ci union { 5462306a36Sopenharmony_ci struct snd_dmaengine_dai_dma_data playback_dma_data; 5562306a36Sopenharmony_ci struct loongson_dma_data tx_dma_data; 5662306a36Sopenharmony_ci }; 5762306a36Sopenharmony_ci union { 5862306a36Sopenharmony_ci struct snd_dmaengine_dai_dma_data capture_dma_data; 5962306a36Sopenharmony_ci struct loongson_dma_data rx_dma_data; 6062306a36Sopenharmony_ci }; 6162306a36Sopenharmony_ci struct regmap *regmap; 6262306a36Sopenharmony_ci void __iomem *reg_base; 6362306a36Sopenharmony_ci u32 rev_id; 6462306a36Sopenharmony_ci u32 clk_rate; 6562306a36Sopenharmony_ci u32 sysclk; 6662306a36Sopenharmony_ci}; 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ciextern const struct dev_pm_ops loongson_i2s_pm; 6962306a36Sopenharmony_ciextern struct snd_soc_dai_driver loongson_i2s_dai; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci#endif 72