1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
4 *
5 * Copyright (c) 2019, Intel Corporation.
6 *
7 */
8
9#include <sound/soc-acpi.h>
10#include <sound/soc-acpi-intel-match.h>
11#include "soc-acpi-intel-sdw-mockup-match.h"
12
13static const struct snd_soc_acpi_codecs essx_83x6 = {
14	.num_codecs = 3,
15	.codecs = { "ESSX8316", "ESSX8326", "ESSX8336"},
16};
17
18static const struct snd_soc_acpi_codecs tgl_codecs = {
19	.num_codecs = 1,
20	.codecs = {"MX98357A"}
21};
22
23static const struct snd_soc_acpi_endpoint single_endpoint = {
24	.num = 0,
25	.aggregated = 0,
26	.group_position = 0,
27	.group_id = 0,
28};
29
30static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
31	.num = 0,
32	.aggregated = 1,
33	.group_position = 0,
34	.group_id = 1,
35};
36
37static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
38	.num = 0,
39	.aggregated = 1,
40	.group_position = 1,
41	.group_id = 1,
42};
43
44static const struct snd_soc_acpi_endpoint rt712_endpoints[] = {
45	{
46		.num = 0,
47		.aggregated = 0,
48		.group_position = 0,
49		.group_id = 0,
50	},
51	{
52		.num = 1,
53		.aggregated = 0,
54		.group_position = 0,
55		.group_id = 0,
56	},
57};
58
59static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
60	{
61		.adr = 0x000020025D071100ull,
62		.num_endpoints = 1,
63		.endpoints = &single_endpoint,
64		.name_prefix = "rt711"
65	}
66};
67
68static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
69	{
70		.adr = 0x000120025D071100ull,
71		.num_endpoints = 1,
72		.endpoints = &single_endpoint,
73		.name_prefix = "rt711"
74	}
75};
76
77static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
78	{
79		.adr = 0x000120025D130800ull,
80		.num_endpoints = 1,
81		.endpoints = &spk_l_endpoint,
82		.name_prefix = "rt1308-1"
83	},
84	{
85		.adr = 0x000122025D130800ull,
86		.num_endpoints = 1,
87		.endpoints = &spk_r_endpoint,
88		.name_prefix = "rt1308-2"
89	}
90};
91
92static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
93	{
94		.adr = 0x000120025D130800ull,
95		.num_endpoints = 1,
96		.endpoints = &single_endpoint,
97		.name_prefix = "rt1308-1"
98	}
99};
100
101static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
102	{
103		.adr = 0x000220025D130800ull,
104		.num_endpoints = 1,
105		.endpoints = &single_endpoint,
106		.name_prefix = "rt1308-1"
107	}
108};
109
110static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
111	{
112		.adr = 0x000120025D130800ull,
113		.num_endpoints = 1,
114		.endpoints = &spk_l_endpoint,
115		.name_prefix = "rt1308-1"
116	}
117};
118
119static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
120	{
121		.adr = 0x000220025D130800ull,
122		.num_endpoints = 1,
123		.endpoints = &spk_r_endpoint,
124		.name_prefix = "rt1308-2"
125	}
126};
127
128static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
129	{
130		.adr = 0x000021025D071500ull,
131		.num_endpoints = 1,
132		.endpoints = &single_endpoint,
133		.name_prefix = "rt715"
134	}
135};
136
137static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
138	{
139		.adr = 0x000320025D071500ull,
140		.num_endpoints = 1,
141		.endpoints = &single_endpoint,
142		.name_prefix = "rt715"
143	}
144};
145
146static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
147	{
148		.adr = 0x000123019F837300ull,
149		.num_endpoints = 1,
150		.endpoints = &spk_r_endpoint,
151		.name_prefix = "Right"
152	},
153	{
154		.adr = 0x000127019F837300ull,
155		.num_endpoints = 1,
156		.endpoints = &spk_l_endpoint,
157		.name_prefix = "Left"
158	}
159};
160
161static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
162	{
163		.adr = 0x000021025D568200ull,
164		.num_endpoints = 1,
165		.endpoints = &single_endpoint,
166		.name_prefix = "rt5682"
167	}
168};
169
170static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
171	{
172		.adr = 0x000030025D071101ull,
173		.num_endpoints = 1,
174		.endpoints = &single_endpoint,
175		.name_prefix = "rt711"
176	}
177};
178
179static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = {
180	{
181		.adr = 0x000131025D131601ull,
182		.num_endpoints = 1,
183		.endpoints = &single_endpoint,
184		.name_prefix = "rt1316-1"
185	}
186};
187
188static const struct snd_soc_acpi_adr_device rt712_0_single_adr[] = {
189	{
190		.adr = 0x000030025D071201ull,
191		.num_endpoints = ARRAY_SIZE(rt712_endpoints),
192		.endpoints = rt712_endpoints,
193		.name_prefix = "rt712"
194	}
195};
196
197static const struct snd_soc_acpi_adr_device rt1712_1_single_adr[] = {
198	{
199		.adr = 0x000130025D171201ull,
200		.num_endpoints = 1,
201		.endpoints = &single_endpoint,
202		.name_prefix = "rt712-dmic"
203	}
204};
205
206static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
207	{
208		.adr = 0x000131025D131601ull, /* unique ID is set for some reason */
209		.num_endpoints = 1,
210		.endpoints = &spk_l_endpoint,
211		.name_prefix = "rt1316-1"
212	}
213};
214
215static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
216	{
217		.adr = 0x000230025D131601ull,
218		.num_endpoints = 1,
219		.endpoints = &spk_r_endpoint,
220		.name_prefix = "rt1316-2"
221	}
222};
223
224static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
225	{
226		.adr = 0x000330025D071401ull,
227		.num_endpoints = 1,
228		.endpoints = &single_endpoint,
229		.name_prefix = "rt714"
230	}
231};
232
233static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
234	{
235		.mask = BIT(0),
236		.num_adr = ARRAY_SIZE(rt711_0_adr),
237		.adr_d = rt711_0_adr,
238	},
239	{
240		.mask = BIT(1),
241		.num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
242		.adr_d = rt1308_1_dual_adr,
243	},
244	{}
245};
246
247static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
248	{
249		.mask = BIT(0),
250		.num_adr = ARRAY_SIZE(rt711_0_adr),
251		.adr_d = rt711_0_adr,
252	},
253	{}
254};
255
256static const struct snd_soc_acpi_link_adr tgl_hp[] = {
257	{
258		.mask = BIT(0),
259		.num_adr = ARRAY_SIZE(rt711_0_adr),
260		.adr_d = rt711_0_adr,
261	},
262	{
263		.mask = BIT(1),
264		.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
265		.adr_d = rt1308_1_single_adr,
266	},
267	{}
268};
269
270static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
271	{
272		.mask = BIT(0),
273		.num_adr = ARRAY_SIZE(rt5682_0_adr),
274		.adr_d = rt5682_0_adr,
275	},
276	{
277		.mask = BIT(1),
278		.num_adr = ARRAY_SIZE(mx8373_1_adr),
279		.adr_d = mx8373_1_adr,
280	},
281	{}
282};
283
284static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
285	{
286		.mask = BIT(0),
287		.num_adr = ARRAY_SIZE(rt711_0_adr),
288		.adr_d = rt711_0_adr,
289	},
290	{
291		.mask = BIT(1),
292		.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
293		.adr_d = rt1308_1_group1_adr,
294	},
295	{
296		.mask = BIT(2),
297		.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
298		.adr_d = rt1308_2_group1_adr,
299	},
300	{
301		.mask = BIT(3),
302		.num_adr = ARRAY_SIZE(rt715_3_adr),
303		.adr_d = rt715_3_adr,
304	},
305	{}
306};
307
308static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
309	{
310		.mask = BIT(0),
311		.num_adr = ARRAY_SIZE(rt711_0_adr),
312		.adr_d = rt711_0_adr,
313	},
314	{
315		.mask = BIT(1),
316		.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
317		.adr_d = rt1308_1_single_adr,
318	},
319	{
320		.mask = BIT(3),
321		.num_adr = ARRAY_SIZE(rt715_3_adr),
322		.adr_d = rt715_3_adr,
323	},
324	{}
325};
326
327static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
328	{
329		.mask = BIT(1),
330		.num_adr = ARRAY_SIZE(rt711_1_adr),
331		.adr_d = rt711_1_adr,
332	},
333	{
334		.mask = BIT(2),
335		.num_adr = ARRAY_SIZE(rt1308_2_single_adr),
336		.adr_d = rt1308_2_single_adr,
337	},
338	{
339		.mask = BIT(0),
340		.num_adr = ARRAY_SIZE(rt715_0_adr),
341		.adr_d = rt715_0_adr,
342	},
343	{}
344};
345
346static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
347	{
348		.mask = BIT(0),
349		.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
350		.adr_d = rt711_sdca_0_adr,
351	},
352	{
353		.mask = BIT(1),
354		.num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
355		.adr_d = rt1316_1_group1_adr,
356	},
357	{
358		.mask = BIT(2),
359		.num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
360		.adr_d = rt1316_2_group1_adr,
361	},
362	{
363		.mask = BIT(3),
364		.num_adr = ARRAY_SIZE(rt714_3_adr),
365		.adr_d = rt714_3_adr,
366	},
367	{}
368};
369
370static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = {
371	{
372		.mask = BIT(0),
373		.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
374		.adr_d = rt711_sdca_0_adr,
375	},
376	{
377		.mask = BIT(1),
378		.num_adr = ARRAY_SIZE(rt1316_1_single_adr),
379		.adr_d = rt1316_1_single_adr,
380	},
381	{
382		.mask = BIT(3),
383		.num_adr = ARRAY_SIZE(rt714_3_adr),
384		.adr_d = rt714_3_adr,
385	},
386	{}
387};
388
389static const struct snd_soc_acpi_link_adr tgl_712_only[] = {
390	{
391		.mask = BIT(0),
392		.num_adr = ARRAY_SIZE(rt712_0_single_adr),
393		.adr_d = rt712_0_single_adr,
394	},
395	{
396		.mask = BIT(1),
397		.num_adr = ARRAY_SIZE(rt1712_1_single_adr),
398		.adr_d = rt1712_1_single_adr,
399	},
400	{}
401};
402
403static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
404	.num_codecs = 1,
405	.codecs = {"MX98373"}
406};
407
408static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
409	.num_codecs = 1,
410	.codecs = {"10EC1011"}
411};
412
413static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = {
414	.num_codecs = 2,
415	.codecs = {"10EC5682", "RTL5682"},
416};
417
418static const struct snd_soc_acpi_codecs tgl_lt6911_hdmi = {
419	.num_codecs = 1,
420	.codecs = {"INTC10B0"}
421};
422
423struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
424	{
425		.comp_ids = &tgl_rt5682_rt5682s_hp,
426		.drv_name = "tgl_mx98357_rt5682",
427		.machine_quirk = snd_soc_acpi_codec_list,
428		.quirk_data = &tgl_codecs,
429		.sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
430	},
431	{
432		.comp_ids = &tgl_rt5682_rt5682s_hp,
433		.drv_name = "tgl_mx98373_rt5682",
434		.machine_quirk = snd_soc_acpi_codec_list,
435		.quirk_data = &tgl_max98373_amp,
436		.sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
437	},
438	{
439		.comp_ids = &tgl_rt5682_rt5682s_hp,
440		.drv_name = "tgl_rt1011_rt5682",
441		.machine_quirk = snd_soc_acpi_codec_list,
442		.quirk_data = &tgl_rt1011_amp,
443		.sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
444	},
445	{
446		.comp_ids = &essx_83x6,
447		.drv_name = "sof-essx8336",
448		.sof_tplg_filename = "sof-tgl-es8336", /* the tplg suffix is added at run time */
449		.tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER |
450					SND_SOC_ACPI_TPLG_INTEL_SSP_MSB |
451					SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER,
452	},
453	{
454		.id = "10EC1308",
455		.drv_name = "tgl_rt1308_hdmi_ssp",
456		.machine_quirk = snd_soc_acpi_codec_list,
457		.quirk_data = &tgl_lt6911_hdmi,
458		.sof_tplg_filename = "sof-tgl-rt1308-ssp2-hdmi-ssp15.tplg"
459	},
460	{},
461};
462EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
463
464/* this table is used when there is no I2S codec present */
465struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
466	/* mockup tests need to be first */
467	{
468		.link_mask = GENMASK(3, 0),
469		.links = sdw_mockup_headset_2amps_mic,
470		.drv_name = "sof_sdw",
471		.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
472	},
473	{
474		.link_mask = BIT(0) | BIT(1) | BIT(3),
475		.links = sdw_mockup_headset_1amp_mic,
476		.drv_name = "sof_sdw",
477		.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
478	},
479	{
480		.link_mask = BIT(0) | BIT(1) | BIT(2),
481		.links = sdw_mockup_mic_headset_1amp,
482		.drv_name = "sof_sdw",
483		.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
484	},
485	{
486		.link_mask = 0xF, /* 4 active links required */
487		.links = tgl_712_only,
488		.drv_name = "sof_sdw",
489		.sof_tplg_filename = "sof-tgl-rt712.tplg",
490	},
491	{
492		.link_mask = 0x7,
493		.links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
494		.drv_name = "sof_sdw",
495		.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
496	},
497	{
498		.link_mask = 0xF, /* 4 active links required */
499		.links = tgl_3_in_1_default,
500		.drv_name = "sof_sdw",
501		.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
502	},
503	{
504		/*
505		 * link_mask should be 0xB, but all links are enabled by BIOS.
506		 * This entry will be selected if there is no rt1308 exposed
507		 * on link2 since it will fail to match the above entry.
508		 */
509		.link_mask = 0xF,
510		.links = tgl_3_in_1_mono_amp,
511		.drv_name = "sof_sdw",
512		.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
513	},
514	{
515		.link_mask = 0xF, /* 4 active links required */
516		.links = tgl_3_in_1_sdca,
517		.drv_name = "sof_sdw",
518		.sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
519	},
520	{
521		/*
522		 * link_mask should be 0xB, but all links are enabled by BIOS.
523		 * This entry will be selected if there is no rt1316 amplifier exposed
524		 * on link2 since it will fail to match the above entry.
525		 */
526
527		.link_mask = 0xF, /* 4 active links required */
528		.links = tgl_3_in_1_sdca_mono,
529		.drv_name = "sof_sdw",
530		.sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg",
531	},
532
533	{
534		.link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
535		.links = tgl_hp,
536		.drv_name = "sof_sdw",
537		.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
538	},
539	{
540		.link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
541		.links = tgl_rvp,
542		.drv_name = "sof_sdw",
543		.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
544	},
545	{
546		.link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
547		.links = tgl_chromebook_base,
548		.drv_name = "sof_sdw",
549		.sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
550	},
551	{
552		.link_mask = 0x1, /* rt711 on link 0 */
553		.links = tgl_rvp_headset_only,
554		.drv_name = "sof_sdw",
555		.sof_tplg_filename = "sof-tgl-rt711.tplg",
556	},
557	{},
558};
559EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);
560