1// SPDX-License-Identifier: GPL-2.0+ 2// Copyright 2018-2021 NXP 3 4#include <linux/clk.h> 5#include <linux/clk-provider.h> 6#include <linux/delay.h> 7#include <linux/dmaengine.h> 8#include <linux/module.h> 9#include <linux/of_device.h> 10#include <linux/of_address.h> 11#include <linux/pm_runtime.h> 12#include <linux/rpmsg.h> 13#include <linux/slab.h> 14#include <sound/core.h> 15#include <sound/dmaengine_pcm.h> 16#include <sound/pcm_params.h> 17 18#include "fsl_rpmsg.h" 19#include "imx-pcm.h" 20 21#define FSL_RPMSG_RATES (SNDRV_PCM_RATE_8000 | \ 22 SNDRV_PCM_RATE_16000 | \ 23 SNDRV_PCM_RATE_48000) 24#define FSL_RPMSG_FORMATS SNDRV_PCM_FMTBIT_S16_LE 25 26/* 192kHz/32bit/2ch/60s size is 0x574e00 */ 27#define LPA_LARGE_BUFFER_SIZE (0x6000000) 28 29static const unsigned int fsl_rpmsg_rates[] = { 30 8000, 11025, 16000, 22050, 44100, 31 32000, 48000, 96000, 88200, 176400, 192000, 32 352800, 384000, 705600, 768000, 1411200, 2822400, 33}; 34 35static const struct snd_pcm_hw_constraint_list fsl_rpmsg_rate_constraints = { 36 .count = ARRAY_SIZE(fsl_rpmsg_rates), 37 .list = fsl_rpmsg_rates, 38}; 39 40static int fsl_rpmsg_hw_params(struct snd_pcm_substream *substream, 41 struct snd_pcm_hw_params *params, 42 struct snd_soc_dai *dai) 43{ 44 struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai); 45 struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL; 46 u64 rate = params_rate(params); 47 int ret = 0; 48 49 /* Get current pll parent */ 50 while (p && rpmsg->pll8k && rpmsg->pll11k) { 51 struct clk *pp = clk_get_parent(p); 52 53 if (clk_is_match(pp, rpmsg->pll8k) || 54 clk_is_match(pp, rpmsg->pll11k)) { 55 pll = pp; 56 break; 57 } 58 p = pp; 59 } 60 61 /* Switch to another pll parent if needed. */ 62 if (pll) { 63 npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k); 64 if (!clk_is_match(pll, npll)) { 65 ret = clk_set_parent(p, npll); 66 if (ret < 0) 67 dev_warn(dai->dev, "failed to set parent %s: %d\n", 68 __clk_get_name(npll), ret); 69 } 70 } 71 72 if (!(rpmsg->mclk_streams & BIT(substream->stream))) { 73 ret = clk_prepare_enable(rpmsg->mclk); 74 if (ret) { 75 dev_err(dai->dev, "failed to enable mclk: %d\n", ret); 76 return ret; 77 } 78 79 rpmsg->mclk_streams |= BIT(substream->stream); 80 } 81 82 return ret; 83} 84 85static int fsl_rpmsg_hw_free(struct snd_pcm_substream *substream, 86 struct snd_soc_dai *dai) 87{ 88 struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai); 89 90 if (rpmsg->mclk_streams & BIT(substream->stream)) { 91 clk_disable_unprepare(rpmsg->mclk); 92 rpmsg->mclk_streams &= ~BIT(substream->stream); 93 } 94 95 return 0; 96} 97 98static int fsl_rpmsg_startup(struct snd_pcm_substream *substream, 99 struct snd_soc_dai *cpu_dai) 100{ 101 int ret; 102 103 ret = snd_pcm_hw_constraint_list(substream->runtime, 0, 104 SNDRV_PCM_HW_PARAM_RATE, 105 &fsl_rpmsg_rate_constraints); 106 107 return ret; 108} 109 110static const struct snd_soc_dai_ops fsl_rpmsg_dai_ops = { 111 .startup = fsl_rpmsg_startup, 112 .hw_params = fsl_rpmsg_hw_params, 113 .hw_free = fsl_rpmsg_hw_free, 114}; 115 116static struct snd_soc_dai_driver fsl_rpmsg_dai = { 117 .playback = { 118 .stream_name = "CPU-Playback", 119 .channels_min = 2, 120 .channels_max = 32, 121 .rates = SNDRV_PCM_RATE_KNOT, 122 .formats = FSL_RPMSG_FORMATS, 123 }, 124 .capture = { 125 .stream_name = "CPU-Capture", 126 .channels_min = 2, 127 .channels_max = 32, 128 .rates = SNDRV_PCM_RATE_KNOT, 129 .formats = FSL_RPMSG_FORMATS, 130 }, 131 .symmetric_rate = 1, 132 .symmetric_channels = 1, 133 .symmetric_sample_bits = 1, 134 .ops = &fsl_rpmsg_dai_ops, 135}; 136 137static const struct snd_soc_component_driver fsl_component = { 138 .name = "fsl-rpmsg", 139 .legacy_dai_naming = 1, 140}; 141 142static const struct fsl_rpmsg_soc_data imx7ulp_data = { 143 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | 144 SNDRV_PCM_RATE_48000, 145 .formats = SNDRV_PCM_FMTBIT_S16_LE, 146}; 147 148static const struct fsl_rpmsg_soc_data imx8mm_data = { 149 .rates = SNDRV_PCM_RATE_KNOT, 150 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 151 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U8 | 152 SNDRV_PCM_FMTBIT_DSD_U16_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE, 153}; 154 155static const struct fsl_rpmsg_soc_data imx8mn_data = { 156 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | 157 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | 158 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | 159 SNDRV_PCM_RATE_192000, 160 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 161 SNDRV_PCM_FMTBIT_S32_LE, 162}; 163 164static const struct fsl_rpmsg_soc_data imx8mp_data = { 165 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | 166 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | 167 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | 168 SNDRV_PCM_RATE_192000, 169 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 170 SNDRV_PCM_FMTBIT_S32_LE, 171}; 172 173static const struct fsl_rpmsg_soc_data imx93_data = { 174 .rates = SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | 175 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000, 176 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 177 SNDRV_PCM_FMTBIT_S32_LE, 178}; 179 180static const struct of_device_id fsl_rpmsg_ids[] = { 181 { .compatible = "fsl,imx7ulp-rpmsg-audio", .data = &imx7ulp_data}, 182 { .compatible = "fsl,imx8mm-rpmsg-audio", .data = &imx8mm_data}, 183 { .compatible = "fsl,imx8mn-rpmsg-audio", .data = &imx8mn_data}, 184 { .compatible = "fsl,imx8mp-rpmsg-audio", .data = &imx8mp_data}, 185 { .compatible = "fsl,imx8ulp-rpmsg-audio", .data = &imx7ulp_data}, 186 { .compatible = "fsl,imx93-rpmsg-audio", .data = &imx93_data}, 187 { /* sentinel */ } 188}; 189MODULE_DEVICE_TABLE(of, fsl_rpmsg_ids); 190 191static int fsl_rpmsg_probe(struct platform_device *pdev) 192{ 193 struct device_node *np = pdev->dev.of_node; 194 struct fsl_rpmsg *rpmsg; 195 int ret; 196 197 rpmsg = devm_kzalloc(&pdev->dev, sizeof(struct fsl_rpmsg), GFP_KERNEL); 198 if (!rpmsg) 199 return -ENOMEM; 200 201 rpmsg->soc_data = of_device_get_match_data(&pdev->dev); 202 203 fsl_rpmsg_dai.playback.rates = rpmsg->soc_data->rates; 204 fsl_rpmsg_dai.capture.rates = rpmsg->soc_data->rates; 205 fsl_rpmsg_dai.playback.formats = rpmsg->soc_data->formats; 206 fsl_rpmsg_dai.capture.formats = rpmsg->soc_data->formats; 207 208 if (of_property_read_bool(np, "fsl,enable-lpa")) { 209 rpmsg->enable_lpa = 1; 210 rpmsg->buffer_size = LPA_LARGE_BUFFER_SIZE; 211 } else { 212 rpmsg->buffer_size = IMX_DEFAULT_DMABUF_SIZE; 213 } 214 215 /* Get the optional clocks */ 216 rpmsg->ipg = devm_clk_get_optional(&pdev->dev, "ipg"); 217 if (IS_ERR(rpmsg->ipg)) 218 return PTR_ERR(rpmsg->ipg); 219 220 rpmsg->mclk = devm_clk_get_optional(&pdev->dev, "mclk"); 221 if (IS_ERR(rpmsg->mclk)) 222 return PTR_ERR(rpmsg->mclk); 223 224 rpmsg->dma = devm_clk_get_optional(&pdev->dev, "dma"); 225 if (IS_ERR(rpmsg->dma)) 226 return PTR_ERR(rpmsg->dma); 227 228 rpmsg->pll8k = devm_clk_get_optional(&pdev->dev, "pll8k"); 229 if (IS_ERR(rpmsg->pll8k)) 230 return PTR_ERR(rpmsg->pll8k); 231 232 rpmsg->pll11k = devm_clk_get_optional(&pdev->dev, "pll11k"); 233 if (IS_ERR(rpmsg->pll11k)) 234 return PTR_ERR(rpmsg->pll11k); 235 236 platform_set_drvdata(pdev, rpmsg); 237 pm_runtime_enable(&pdev->dev); 238 239 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component, 240 &fsl_rpmsg_dai, 1); 241 if (ret) 242 goto err_pm_disable; 243 244 rpmsg->card_pdev = platform_device_register_data(&pdev->dev, 245 "imx-audio-rpmsg", 246 PLATFORM_DEVID_AUTO, 247 NULL, 248 0); 249 if (IS_ERR(rpmsg->card_pdev)) { 250 dev_err(&pdev->dev, "failed to register rpmsg card\n"); 251 ret = PTR_ERR(rpmsg->card_pdev); 252 goto err_pm_disable; 253 } 254 255 return 0; 256 257err_pm_disable: 258 pm_runtime_disable(&pdev->dev); 259 return ret; 260} 261 262static void fsl_rpmsg_remove(struct platform_device *pdev) 263{ 264 struct fsl_rpmsg *rpmsg = platform_get_drvdata(pdev); 265 266 pm_runtime_disable(&pdev->dev); 267 268 if (rpmsg->card_pdev) 269 platform_device_unregister(rpmsg->card_pdev); 270} 271 272#ifdef CONFIG_PM 273static int fsl_rpmsg_runtime_resume(struct device *dev) 274{ 275 struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev); 276 int ret; 277 278 ret = clk_prepare_enable(rpmsg->ipg); 279 if (ret) { 280 dev_err(dev, "failed to enable ipg clock: %d\n", ret); 281 goto ipg_err; 282 } 283 284 ret = clk_prepare_enable(rpmsg->dma); 285 if (ret) { 286 dev_err(dev, "Failed to enable dma clock %d\n", ret); 287 goto dma_err; 288 } 289 290 return 0; 291 292dma_err: 293 clk_disable_unprepare(rpmsg->ipg); 294ipg_err: 295 return ret; 296} 297 298static int fsl_rpmsg_runtime_suspend(struct device *dev) 299{ 300 struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev); 301 302 clk_disable_unprepare(rpmsg->dma); 303 clk_disable_unprepare(rpmsg->ipg); 304 305 return 0; 306} 307#endif 308 309static const struct dev_pm_ops fsl_rpmsg_pm_ops = { 310 SET_RUNTIME_PM_OPS(fsl_rpmsg_runtime_suspend, 311 fsl_rpmsg_runtime_resume, 312 NULL) 313}; 314 315static struct platform_driver fsl_rpmsg_driver = { 316 .probe = fsl_rpmsg_probe, 317 .remove_new = fsl_rpmsg_remove, 318 .driver = { 319 .name = "fsl_rpmsg", 320 .pm = &fsl_rpmsg_pm_ops, 321 .of_match_table = fsl_rpmsg_ids, 322 }, 323}; 324module_platform_driver(fsl_rpmsg_driver); 325 326MODULE_DESCRIPTION("Freescale SoC Audio PRMSG CPU Interface"); 327MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>"); 328MODULE_ALIAS("platform:fsl_rpmsg"); 329MODULE_LICENSE("GPL"); 330