1// SPDX-License-Identifier: GPL-2.0-only
2//
3// rt712-sdca-dmic.c -- rt712 SDCA DMIC ALSA SoC audio driver
4//
5// Copyright(c) 2023 Realtek Semiconductor Corp.
6//
7//
8
9#include <linux/module.h>
10#include <linux/mod_devicetable.h>
11#include <linux/pm_runtime.h>
12#include <linux/soundwire/sdw_registers.h>
13#include <linux/slab.h>
14#include <sound/core.h>
15#include <sound/pcm.h>
16#include <sound/pcm_params.h>
17#include <sound/tlv.h>
18#include "rt712-sdca.h"
19#include "rt712-sdca-dmic.h"
20
21static bool rt712_sdca_dmic_readable_register(struct device *dev, unsigned int reg)
22{
23	switch (reg) {
24	case 0x201a ... 0x201f:
25	case 0x2029 ... 0x202a:
26	case 0x202d ... 0x2034:
27	case 0x2230 ... 0x2232:
28	case 0x2f01 ... 0x2f0a:
29	case 0x2f35 ... 0x2f36:
30	case 0x2f52:
31	case 0x2f58 ... 0x2f59:
32	case 0x3201:
33	case 0x320c:
34		return true;
35	default:
36		return false;
37	}
38}
39
40static bool rt712_sdca_dmic_volatile_register(struct device *dev, unsigned int reg)
41{
42	switch (reg) {
43	case 0x201b:
44	case 0x201c:
45	case 0x201d:
46	case 0x201f:
47	case 0x202d ... 0x202f:
48	case 0x2230:
49	case 0x2f01:
50	case 0x2f35:
51	case 0x320c:
52		return true;
53	default:
54		return false;
55	}
56}
57
58static bool rt712_sdca_dmic_mbq_readable_register(struct device *dev, unsigned int reg)
59{
60	switch (reg) {
61	case 0x2000000 ... 0x200008e:
62	case 0x5300000 ... 0x530000e:
63	case 0x5400000 ... 0x540000e:
64	case 0x5600000 ... 0x5600008:
65	case 0x5700000 ... 0x570000d:
66	case 0x5800000 ... 0x5800021:
67	case 0x5900000 ... 0x5900028:
68	case 0x5a00000 ... 0x5a00009:
69	case 0x5b00000 ... 0x5b00051:
70	case 0x5c00000 ... 0x5c0009a:
71	case 0x5d00000 ... 0x5d00009:
72	case 0x5f00000 ... 0x5f00030:
73	case 0x6100000 ... 0x6100068:
74	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
75	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
76	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
77	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
78	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
79	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
80	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
81	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
82		return true;
83	default:
84		return false;
85	}
86}
87
88static bool rt712_sdca_dmic_mbq_volatile_register(struct device *dev, unsigned int reg)
89{
90	switch (reg) {
91	case 0x2000000:
92	case 0x200001a:
93	case 0x2000024:
94	case 0x2000046:
95	case 0x200008a:
96	case 0x5800000:
97	case 0x5800001:
98	case 0x6100008:
99		return true;
100	default:
101		return false;
102	}
103}
104
105static const struct regmap_config rt712_sdca_dmic_regmap = {
106	.reg_bits = 32,
107	.val_bits = 8,
108	.readable_reg = rt712_sdca_dmic_readable_register,
109	.volatile_reg = rt712_sdca_dmic_volatile_register,
110	.max_register = 0x40981300,
111	.reg_defaults = rt712_sdca_dmic_reg_defaults,
112	.num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_reg_defaults),
113	.cache_type = REGCACHE_MAPLE,
114	.use_single_read = true,
115	.use_single_write = true,
116};
117
118static const struct regmap_config rt712_sdca_dmic_mbq_regmap = {
119	.name = "sdw-mbq",
120	.reg_bits = 32,
121	.val_bits = 16,
122	.readable_reg = rt712_sdca_dmic_mbq_readable_register,
123	.volatile_reg = rt712_sdca_dmic_mbq_volatile_register,
124	.max_register = 0x40800f14,
125	.reg_defaults = rt712_sdca_dmic_mbq_defaults,
126	.num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_mbq_defaults),
127	.cache_type = REGCACHE_MAPLE,
128	.use_single_read = true,
129	.use_single_write = true,
130};
131
132static int rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv *rt712,
133		unsigned int nid, unsigned int reg, unsigned int value)
134{
135	int ret;
136	struct regmap *regmap = rt712->mbq_regmap;
137	unsigned int addr = (nid << 20) | reg;
138
139	ret = regmap_write(regmap, addr, value);
140	if (ret < 0)
141		dev_err(&rt712->slave->dev,
142			"Failed to set private value: %06x <= %04x ret=%d\n",
143			addr, value, ret);
144
145	return ret;
146}
147
148static int rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv *rt712,
149		unsigned int nid, unsigned int reg, unsigned int *value)
150{
151	int ret;
152	struct regmap *regmap = rt712->mbq_regmap;
153	unsigned int addr = (nid << 20) | reg;
154
155	ret = regmap_read(regmap, addr, value);
156	if (ret < 0)
157		dev_err(&rt712->slave->dev,
158			"Failed to get private value: %06x => %04x ret=%d\n",
159			addr, *value, ret);
160
161	return ret;
162}
163
164static int rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv *rt712,
165	unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
166{
167	unsigned int tmp;
168	int ret;
169
170	ret = rt712_sdca_dmic_index_read(rt712, nid, reg, &tmp);
171	if (ret < 0)
172		return ret;
173
174	set_mask_bits(&tmp, mask, val);
175	return rt712_sdca_dmic_index_write(rt712, nid, reg, tmp);
176}
177
178static int rt712_sdca_dmic_io_init(struct device *dev, struct sdw_slave *slave)
179{
180	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
181
182	if (rt712->hw_init)
183		return 0;
184
185	regcache_cache_only(rt712->regmap, false);
186	regcache_cache_only(rt712->mbq_regmap, false);
187	if (rt712->first_hw_init) {
188		regcache_cache_bypass(rt712->regmap, true);
189		regcache_cache_bypass(rt712->mbq_regmap, true);
190	} else {
191		/*
192		 * PM runtime status is marked as 'active' only when a Slave reports as Attached
193		 */
194
195		/* update count of parent 'active' children */
196		pm_runtime_set_active(&slave->dev);
197	}
198
199	pm_runtime_get_noresume(&slave->dev);
200
201	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
202		RT712_ADC0A_08_PDE_FLOAT_CTL, 0x1112);
203	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
204		RT712_ADC0B_11_PDE_FLOAT_CTL, 0x1111);
205	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
206		RT712_DMIC1_2_PDE_FLOAT_CTL, 0x1111);
207	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
208		RT712_I2S_IN_OUT_PDE_FLOAT_CTL, 0x1155);
209	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
210		RT712_DMIC_ENT_FLOAT_CTL, 0x2626);
211	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
212		RT712_ADC_ENT_FLOAT_CTL, 0x1e19);
213	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
214		RT712_DMIC_GAIN_ENT_FLOAT_CTL0, 0x1515);
215	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
216		RT712_ADC_VOL_CH_FLOAT_CTL2, 0x0304);
217	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
218		RT712_DMIC_GAIN_ENT_FLOAT_CTL2, 0x0304);
219	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
220		RT712_HDA_LEGACY_CONFIG_CTL0, 0x0050);
221	regmap_write(rt712->regmap,
222		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x01);
223	rt712_sdca_dmic_index_write(rt712, RT712_ULTRA_SOUND_DET,
224		RT712_ULTRA_SOUND_DETECTOR6, 0x3200);
225	regmap_write(rt712->regmap, RT712_RC_CAL, 0x23);
226	regmap_write(rt712->regmap, 0x2f52, 0x00);
227
228	if (rt712->first_hw_init) {
229		regcache_cache_bypass(rt712->regmap, false);
230		regcache_mark_dirty(rt712->regmap);
231		regcache_cache_bypass(rt712->mbq_regmap, false);
232		regcache_mark_dirty(rt712->mbq_regmap);
233	} else
234		rt712->first_hw_init = true;
235
236	/* Mark Slave initialization complete */
237	rt712->hw_init = true;
238
239	pm_runtime_mark_last_busy(&slave->dev);
240	pm_runtime_put_autosuspend(&slave->dev);
241
242	dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
243	return 0;
244}
245
246static int rt712_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
247		struct snd_ctl_elem_value *ucontrol)
248{
249	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
250	struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
251	struct rt712_sdca_dmic_kctrl_priv *p =
252		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
253	unsigned int regvalue, ctl, i;
254	unsigned int adc_vol_flag = 0;
255	const unsigned int interval_offset = 0xc0;
256
257	if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
258		adc_vol_flag = 1;
259
260	/* check all channels */
261	for (i = 0; i < p->count; i++) {
262		regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue);
263
264		if (!adc_vol_flag) /* boost gain */
265			ctl = regvalue / 0x0a00;
266		else { /* ADC gain */
267			if (adc_vol_flag)
268				ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset);
269			else
270				ctl = p->max - (((0 - regvalue) & 0xffff) / interval_offset);
271		}
272
273		ucontrol->value.integer.value[i] = ctl;
274	}
275
276	return 0;
277}
278
279static int rt712_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
280		struct snd_ctl_elem_value *ucontrol)
281{
282	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
283	struct rt712_sdca_dmic_kctrl_priv *p =
284		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
285	struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
286	unsigned int gain_val[4];
287	unsigned int i, adc_vol_flag = 0, changed = 0;
288	unsigned int regvalue[4];
289	const unsigned int interval_offset = 0xc0;
290	int err;
291
292	if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
293		adc_vol_flag = 1;
294
295	/* check all channels */
296	for (i = 0; i < p->count; i++) {
297		regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue[i]);
298
299		gain_val[i] = ucontrol->value.integer.value[i];
300		if (gain_val[i] > p->max)
301			gain_val[i] = p->max;
302
303		if (!adc_vol_flag) /* boost gain */
304			gain_val[i] = gain_val[i] * 0x0a00;
305		else { /* ADC gain */
306			gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset);
307			gain_val[i] &= 0xffff;
308		}
309
310		if (regvalue[i] != gain_val[i])
311			changed = 1;
312	}
313
314	if (!changed)
315		return 0;
316
317	for (i = 0; i < p->count; i++) {
318		err = regmap_write(rt712->mbq_regmap, p->reg_base + i, gain_val[i]);
319		if (err < 0)
320			dev_err(&rt712->slave->dev, "0x%08x can't be set\n", p->reg_base + i);
321	}
322
323	return changed;
324}
325
326static int rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv *rt712)
327{
328	int err, i;
329	unsigned int ch_mute;
330
331	for (i = 0; i < ARRAY_SIZE(rt712->fu1e_mixer_mute); i++) {
332		ch_mute = (rt712->fu1e_dapm_mute || rt712->fu1e_mixer_mute[i]) ? 0x01 : 0x00;
333		err = regmap_write(rt712->regmap,
334				SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E,
335				RT712_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
336		if (err < 0)
337			return err;
338	}
339
340	return 0;
341}
342
343static int rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol *kcontrol,
344			struct snd_ctl_elem_value *ucontrol)
345{
346	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
347	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
348	struct rt712_sdca_dmic_kctrl_priv *p =
349		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
350	unsigned int i;
351
352	for (i = 0; i < p->count; i++)
353		ucontrol->value.integer.value[i] = !rt712->fu1e_mixer_mute[i];
354
355	return 0;
356}
357
358static int rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol *kcontrol,
359			struct snd_ctl_elem_value *ucontrol)
360{
361	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
362	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
363	struct rt712_sdca_dmic_kctrl_priv *p =
364		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
365	int err, changed = 0, i;
366
367	for (i = 0; i < p->count; i++) {
368		if (rt712->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
369			changed = 1;
370		rt712->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
371	}
372
373	err = rt712_sdca_set_fu1e_capture_ctl(rt712);
374	if (err < 0)
375		return err;
376
377	return changed;
378}
379
380static int rt712_sdca_fu_info(struct snd_kcontrol *kcontrol,
381	struct snd_ctl_elem_info *uinfo)
382{
383	struct rt712_sdca_dmic_kctrl_priv *p =
384		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
385
386	if (p->max == 1)
387		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
388	else
389		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
390	uinfo->count = p->count;
391	uinfo->value.integer.min = 0;
392	uinfo->value.integer.max = p->max;
393	return 0;
394}
395
396#define RT712_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
397	((unsigned long)&(struct rt712_sdca_dmic_kctrl_priv) \
398		{.reg_base = xreg_base, .count = xcount, .max = xmax, \
399		.invert = xinvert})
400
401#define RT712_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
402{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
403	.info = rt712_sdca_fu_info, \
404	.get = rt712_sdca_dmic_fu1e_capture_get, \
405	.put = rt712_sdca_dmic_fu1e_capture_put, \
406	.private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
407
408#define RT712_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
409	 xhandler_put, xcount, xmax, tlv_array) \
410{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
411	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
412		 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
413	.tlv.p = (tlv_array), \
414	.info = rt712_sdca_fu_info, \
415	.get = xhandler_get, .put = xhandler_put, \
416	.private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
417
418static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
419static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
420
421static const struct snd_kcontrol_new rt712_sdca_dmic_snd_controls[] = {
422	RT712_SDCA_FU_CTRL("FU1E Capture Switch",
423		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01),
424		1, 1, 4),
425	RT712_SDCA_EXT_TLV("FU1E Capture Volume",
426		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01),
427		rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 0x3f, in_vol_tlv),
428	RT712_SDCA_EXT_TLV("FU15 Boost Volume",
429		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01),
430		rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 3, mic_vol_tlv),
431};
432
433static int rt712_sdca_dmic_mux_get(struct snd_kcontrol *kcontrol,
434			struct snd_ctl_elem_value *ucontrol)
435{
436	struct snd_soc_component *component =
437		snd_soc_dapm_kcontrol_component(kcontrol);
438	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
439	unsigned int val = 0, mask_sft;
440
441	if (strstr(ucontrol->id.name, "ADC 25 Mux"))
442		mask_sft = 8;
443	else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
444		mask_sft = 4;
445	else
446		return -EINVAL;
447
448	rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
449		RT712_HDA_LEGACY_MUX_CTL0, &val);
450
451	ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;
452
453	return 0;
454}
455
456static int rt712_sdca_dmic_mux_put(struct snd_kcontrol *kcontrol,
457			struct snd_ctl_elem_value *ucontrol)
458{
459	struct snd_soc_component *component =
460		snd_soc_dapm_kcontrol_component(kcontrol);
461	struct snd_soc_dapm_context *dapm =
462		snd_soc_dapm_kcontrol_dapm(kcontrol);
463	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
464	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
465	unsigned int *item = ucontrol->value.enumerated.item;
466	unsigned int val, val2 = 0, change, mask_sft;
467
468	if (item[0] >= e->items)
469		return -EINVAL;
470
471	if (strstr(ucontrol->id.name, "ADC 25 Mux"))
472		mask_sft = 8;
473	else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
474		mask_sft = 4;
475	else
476		return -EINVAL;
477
478	val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
479
480	rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
481		RT712_HDA_LEGACY_MUX_CTL0, &val2);
482	val2 = (0x7 << mask_sft) & val2;
483
484	if (val == val2)
485		change = 0;
486	else
487		change = 1;
488
489	if (change)
490		rt712_sdca_dmic_index_update_bits(rt712, RT712_VENDOR_HDA_CTL,
491			RT712_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
492			val << mask_sft);
493
494	snd_soc_dapm_mux_update_power(dapm, kcontrol,
495		item[0], e, NULL);
496
497	return change;
498}
499
500static const char * const adc_mux_text[] = {
501	"DMIC1",
502	"DMIC2",
503};
504
505static SOC_ENUM_SINGLE_DECL(
506	rt712_adc25_enum, SND_SOC_NOPM, 0, adc_mux_text);
507
508static SOC_ENUM_SINGLE_DECL(
509	rt712_adc26_enum, SND_SOC_NOPM, 0, adc_mux_text);
510
511static const struct snd_kcontrol_new rt712_sdca_dmic_adc25_mux =
512	SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt712_adc25_enum,
513			rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
514
515static const struct snd_kcontrol_new rt712_sdca_dmic_adc26_mux =
516	SOC_DAPM_ENUM_EXT("ADC 26 Mux", rt712_adc26_enum,
517			rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
518
519static int rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget *w,
520	struct snd_kcontrol *kcontrol, int event)
521{
522	struct snd_soc_component *component =
523		snd_soc_dapm_to_component(w->dapm);
524	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
525
526	switch (event) {
527	case SND_SOC_DAPM_POST_PMU:
528		rt712->fu1e_dapm_mute = false;
529		rt712_sdca_set_fu1e_capture_ctl(rt712);
530		break;
531	case SND_SOC_DAPM_PRE_PMD:
532		rt712->fu1e_dapm_mute = true;
533		rt712_sdca_set_fu1e_capture_ctl(rt712);
534		break;
535	}
536	return 0;
537}
538
539static int rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget *w,
540	struct snd_kcontrol *kcontrol, int event)
541{
542	struct snd_soc_component *component =
543		snd_soc_dapm_to_component(w->dapm);
544	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
545	unsigned char ps0 = 0x0, ps3 = 0x3;
546
547	switch (event) {
548	case SND_SOC_DAPM_POST_PMU:
549		regmap_write(rt712->regmap,
550			SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
551				RT712_SDCA_CTL_REQ_POWER_STATE, 0),
552				ps0);
553		break;
554	case SND_SOC_DAPM_PRE_PMD:
555		regmap_write(rt712->regmap,
556			SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
557				RT712_SDCA_CTL_REQ_POWER_STATE, 0),
558				ps3);
559		break;
560	}
561	return 0;
562}
563
564static const struct snd_soc_dapm_widget rt712_sdca_dmic_dapm_widgets[] = {
565	SND_SOC_DAPM_INPUT("DMIC1"),
566	SND_SOC_DAPM_INPUT("DMIC2"),
567
568	SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
569		rt712_sdca_dmic_pde11_event,
570		SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
571
572	SND_SOC_DAPM_ADC_E("FU 1E", NULL, SND_SOC_NOPM, 0, 0,
573		rt712_sdca_dmic_fu1e_event,
574		SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
575	SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
576		&rt712_sdca_dmic_adc25_mux),
577	SND_SOC_DAPM_MUX("ADC 26 Mux", SND_SOC_NOPM, 0, 0,
578		&rt712_sdca_dmic_adc26_mux),
579
580	SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0),
581};
582
583static const struct snd_soc_dapm_route rt712_sdca_dmic_audio_map[] = {
584	{"DP2TX", NULL, "FU 1E"},
585
586	{"FU 1E", NULL, "PDE 11"},
587	{"FU 1E", NULL, "ADC 25 Mux"},
588	{"FU 1E", NULL, "ADC 26 Mux"},
589	{"ADC 25 Mux", "DMIC1", "DMIC1"},
590	{"ADC 25 Mux", "DMIC2", "DMIC2"},
591	{"ADC 26 Mux", "DMIC1", "DMIC1"},
592	{"ADC 26 Mux", "DMIC2", "DMIC2"},
593};
594
595static int rt712_sdca_dmic_probe(struct snd_soc_component *component)
596{
597	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
598	int ret;
599
600	rt712->component = component;
601
602	if (!rt712->first_hw_init)
603		return 0;
604
605	ret = pm_runtime_resume(component->dev);
606	if (ret < 0 && ret != -EACCES)
607		return ret;
608
609	return 0;
610}
611
612static const struct snd_soc_component_driver soc_sdca_dev_rt712_dmic = {
613	.probe = rt712_sdca_dmic_probe,
614	.controls = rt712_sdca_dmic_snd_controls,
615	.num_controls = ARRAY_SIZE(rt712_sdca_dmic_snd_controls),
616	.dapm_widgets = rt712_sdca_dmic_dapm_widgets,
617	.num_dapm_widgets = ARRAY_SIZE(rt712_sdca_dmic_dapm_widgets),
618	.dapm_routes = rt712_sdca_dmic_audio_map,
619	.num_dapm_routes = ARRAY_SIZE(rt712_sdca_dmic_audio_map),
620	.endianness = 1,
621};
622
623static int rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
624				int direction)
625{
626	snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
627
628	return 0;
629}
630
631static void rt712_sdca_dmic_shutdown(struct snd_pcm_substream *substream,
632				struct snd_soc_dai *dai)
633{
634	snd_soc_dai_set_dma_data(dai, substream, NULL);
635}
636
637static int rt712_sdca_dmic_hw_params(struct snd_pcm_substream *substream,
638				struct snd_pcm_hw_params *params,
639				struct snd_soc_dai *dai)
640{
641	struct snd_soc_component *component = dai->component;
642	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
643	struct sdw_stream_config stream_config;
644	struct sdw_port_config port_config;
645	struct sdw_stream_runtime *sdw_stream;
646	int retval, num_channels;
647	unsigned int sampling_rate;
648
649	dev_dbg(dai->dev, "%s %s", __func__, dai->name);
650	sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
651
652	if (!sdw_stream)
653		return -EINVAL;
654
655	if (!rt712->slave)
656		return -EINVAL;
657
658	stream_config.frame_rate = params_rate(params);
659	stream_config.ch_count = params_channels(params);
660	stream_config.bps = snd_pcm_format_width(params_format(params));
661	stream_config.direction = SDW_DATA_DIR_TX;
662
663	num_channels = params_channels(params);
664	port_config.ch_mask = GENMASK(num_channels - 1, 0);
665	port_config.num = 2;
666
667	retval = sdw_stream_add_slave(rt712->slave, &stream_config,
668					&port_config, 1, sdw_stream);
669	if (retval) {
670		dev_err(dai->dev, "Unable to configure port\n");
671		return retval;
672	}
673
674	if (params_channels(params) > 4) {
675		dev_err(component->dev, "Unsupported channels %d\n",
676			params_channels(params));
677		return -EINVAL;
678	}
679
680	/* sampling rate configuration */
681	switch (params_rate(params)) {
682	case 16000:
683		sampling_rate = RT712_SDCA_RATE_16000HZ;
684		break;
685	case 32000:
686		sampling_rate = RT712_SDCA_RATE_32000HZ;
687		break;
688	case 44100:
689		sampling_rate = RT712_SDCA_RATE_44100HZ;
690		break;
691	case 48000:
692		sampling_rate = RT712_SDCA_RATE_48000HZ;
693		break;
694	case 96000:
695		sampling_rate = RT712_SDCA_RATE_96000HZ;
696		break;
697	case 192000:
698		sampling_rate = RT712_SDCA_RATE_192000HZ;
699		break;
700	default:
701		dev_err(component->dev, "Rate %d is not supported\n",
702			params_rate(params));
703		return -EINVAL;
704	}
705
706	/* set sampling frequency */
707	regmap_write(rt712->regmap,
708		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
709		sampling_rate);
710	regmap_write(rt712->regmap,
711		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
712		sampling_rate);
713
714	return 0;
715}
716
717static int rt712_sdca_dmic_hw_free(struct snd_pcm_substream *substream,
718				struct snd_soc_dai *dai)
719{
720	struct snd_soc_component *component = dai->component;
721	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
722	struct sdw_stream_runtime *sdw_stream =
723		snd_soc_dai_get_dma_data(dai, substream);
724
725	if (!rt712->slave)
726		return -EINVAL;
727
728	sdw_stream_remove_slave(rt712->slave, sdw_stream);
729	return 0;
730}
731
732#define RT712_STEREO_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
733			SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
734#define RT712_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
735			SNDRV_PCM_FMTBIT_S24_LE)
736
737static const struct snd_soc_dai_ops rt712_sdca_dmic_ops = {
738	.hw_params	= rt712_sdca_dmic_hw_params,
739	.hw_free	= rt712_sdca_dmic_hw_free,
740	.set_stream	= rt712_sdca_dmic_set_sdw_stream,
741	.shutdown	= rt712_sdca_dmic_shutdown,
742};
743
744static struct snd_soc_dai_driver rt712_sdca_dmic_dai[] = {
745	{
746		.name = "rt712-sdca-dmic-aif1",
747		.id = RT712_AIF1,
748		.capture = {
749			.stream_name = "DP2 Capture",
750			.channels_min = 1,
751			.channels_max = 4,
752			.rates = RT712_STEREO_RATES,
753			.formats = RT712_FORMATS,
754		},
755		.ops = &rt712_sdca_dmic_ops,
756	},
757};
758
759static int rt712_sdca_dmic_init(struct device *dev, struct regmap *regmap,
760			struct regmap *mbq_regmap, struct sdw_slave *slave)
761{
762	struct rt712_sdca_dmic_priv *rt712;
763	int ret;
764
765	rt712 = devm_kzalloc(dev, sizeof(*rt712), GFP_KERNEL);
766	if (!rt712)
767		return -ENOMEM;
768
769	dev_set_drvdata(dev, rt712);
770	rt712->slave = slave;
771	rt712->regmap = regmap;
772	rt712->mbq_regmap = mbq_regmap;
773
774	regcache_cache_only(rt712->regmap, true);
775	regcache_cache_only(rt712->mbq_regmap, true);
776
777	/*
778	 * Mark hw_init to false
779	 * HW init will be performed when device reports present
780	 */
781	rt712->hw_init = false;
782	rt712->first_hw_init = false;
783	rt712->fu1e_dapm_mute = true;
784	rt712->fu1e_mixer_mute[0] = rt712->fu1e_mixer_mute[1] =
785		rt712->fu1e_mixer_mute[2] = rt712->fu1e_mixer_mute[3] = true;
786
787	ret =  devm_snd_soc_register_component(dev,
788			&soc_sdca_dev_rt712_dmic,
789			rt712_sdca_dmic_dai,
790			ARRAY_SIZE(rt712_sdca_dmic_dai));
791	if (ret < 0)
792		return ret;
793
794	/* set autosuspend parameters */
795	pm_runtime_set_autosuspend_delay(dev, 3000);
796	pm_runtime_use_autosuspend(dev);
797
798	/* make sure the device does not suspend immediately */
799	pm_runtime_mark_last_busy(dev);
800
801	pm_runtime_enable(dev);
802
803	/* important note: the device is NOT tagged as 'active' and will remain
804	 * 'suspended' until the hardware is enumerated/initialized. This is required
805	 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
806	 * fail with -EACCESS because of race conditions between card creation and enumeration
807	 */
808
809	dev_dbg(dev, "%s\n", __func__);
810
811	return 0;
812}
813
814
815static int rt712_sdca_dmic_update_status(struct sdw_slave *slave,
816				enum sdw_slave_status status)
817{
818	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(&slave->dev);
819
820	if (status == SDW_SLAVE_UNATTACHED)
821		rt712->hw_init = false;
822
823	/*
824	 * Perform initialization only if slave status is present and
825	 * hw_init flag is false
826	 */
827	if (rt712->hw_init || status != SDW_SLAVE_ATTACHED)
828		return 0;
829
830	/* perform I/O transfers required for Slave initialization */
831	return rt712_sdca_dmic_io_init(&slave->dev, slave);
832}
833
834static int rt712_sdca_dmic_read_prop(struct sdw_slave *slave)
835{
836	struct sdw_slave_prop *prop = &slave->prop;
837	int nval, i;
838	u32 bit;
839	unsigned long addr;
840	struct sdw_dpn_prop *dpn;
841
842	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
843	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
844
845	prop->paging_support = true;
846
847	/* first we need to allocate memory for set bits in port lists */
848	prop->source_ports = BIT(2); /* BITMAP: 00000100 */
849	prop->sink_ports = 0;
850
851	nval = hweight32(prop->source_ports);
852	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
853		sizeof(*prop->src_dpn_prop), GFP_KERNEL);
854	if (!prop->src_dpn_prop)
855		return -ENOMEM;
856
857	i = 0;
858	dpn = prop->src_dpn_prop;
859	addr = prop->source_ports;
860	for_each_set_bit(bit, &addr, 32) {
861		dpn[i].num = bit;
862		dpn[i].type = SDW_DPN_FULL;
863		dpn[i].simple_ch_prep_sm = true;
864		dpn[i].ch_prep_timeout = 10;
865		i++;
866	}
867
868	/* set the timeout values */
869	prop->clk_stop_timeout = 200;
870
871	/* wake-up event */
872	prop->wake_capable = 1;
873
874	return 0;
875}
876
877static const struct sdw_device_id rt712_sdca_dmic_id[] = {
878	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1712, 0x3, 0x1, 0),
879	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1713, 0x3, 0x1, 0),
880	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1716, 0x3, 0x1, 0),
881	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1717, 0x3, 0x1, 0),
882	{},
883};
884MODULE_DEVICE_TABLE(sdw, rt712_sdca_dmic_id);
885
886static int __maybe_unused rt712_sdca_dmic_dev_suspend(struct device *dev)
887{
888	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
889
890	if (!rt712->hw_init)
891		return 0;
892
893	regcache_cache_only(rt712->regmap, true);
894	regcache_cache_only(rt712->mbq_regmap, true);
895
896	return 0;
897}
898
899static int __maybe_unused rt712_sdca_dmic_dev_system_suspend(struct device *dev)
900{
901	struct rt712_sdca_dmic_priv *rt712_sdca = dev_get_drvdata(dev);
902
903	if (!rt712_sdca->hw_init)
904		return 0;
905
906	return rt712_sdca_dmic_dev_suspend(dev);
907}
908
909#define RT712_PROBE_TIMEOUT 5000
910
911static int __maybe_unused rt712_sdca_dmic_dev_resume(struct device *dev)
912{
913	struct sdw_slave *slave = dev_to_sdw_dev(dev);
914	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
915	unsigned long time;
916
917	if (!rt712->first_hw_init)
918		return 0;
919
920	if (!slave->unattach_request)
921		goto regmap_sync;
922
923	time = wait_for_completion_timeout(&slave->initialization_complete,
924				msecs_to_jiffies(RT712_PROBE_TIMEOUT));
925	if (!time) {
926		dev_err(&slave->dev, "Initialization not complete, timed out\n");
927		sdw_show_ping_status(slave->bus, true);
928
929		return -ETIMEDOUT;
930	}
931
932regmap_sync:
933	slave->unattach_request = 0;
934	regcache_cache_only(rt712->regmap, false);
935	regcache_sync(rt712->regmap);
936	regcache_cache_only(rt712->mbq_regmap, false);
937	regcache_sync(rt712->mbq_regmap);
938	return 0;
939}
940
941static const struct dev_pm_ops rt712_sdca_dmic_pm = {
942	SET_SYSTEM_SLEEP_PM_OPS(rt712_sdca_dmic_dev_system_suspend, rt712_sdca_dmic_dev_resume)
943	SET_RUNTIME_PM_OPS(rt712_sdca_dmic_dev_suspend, rt712_sdca_dmic_dev_resume, NULL)
944};
945
946
947static struct sdw_slave_ops rt712_sdca_dmic_slave_ops = {
948	.read_prop = rt712_sdca_dmic_read_prop,
949	.update_status = rt712_sdca_dmic_update_status,
950};
951
952static int rt712_sdca_dmic_sdw_probe(struct sdw_slave *slave,
953				const struct sdw_device_id *id)
954{
955	struct regmap *regmap, *mbq_regmap;
956
957	/* Regmap Initialization */
958	mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt712_sdca_dmic_mbq_regmap);
959	if (IS_ERR(mbq_regmap))
960		return PTR_ERR(mbq_regmap);
961
962	regmap = devm_regmap_init_sdw(slave, &rt712_sdca_dmic_regmap);
963	if (IS_ERR(regmap))
964		return PTR_ERR(regmap);
965
966	return rt712_sdca_dmic_init(&slave->dev, regmap, mbq_regmap, slave);
967}
968
969static int rt712_sdca_dmic_sdw_remove(struct sdw_slave *slave)
970{
971	pm_runtime_disable(&slave->dev);
972
973	return 0;
974}
975
976static struct sdw_driver rt712_sdca_dmic_sdw_driver = {
977	.driver = {
978		.name = "rt712-sdca-dmic",
979		.owner = THIS_MODULE,
980		.pm = &rt712_sdca_dmic_pm,
981	},
982	.probe = rt712_sdca_dmic_sdw_probe,
983	.remove = rt712_sdca_dmic_sdw_remove,
984	.ops = &rt712_sdca_dmic_slave_ops,
985	.id_table = rt712_sdca_dmic_id,
986};
987module_sdw_driver(rt712_sdca_dmic_sdw_driver);
988
989MODULE_DESCRIPTION("ASoC RT712 SDCA DMIC SDW driver");
990MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
991MODULE_LICENSE("GPL");
992