1// SPDX-License-Identifier: GPL-2.0-only 2// 3// es8326.c -- es8326 ALSA SoC audio driver 4// Copyright Everest Semiconductor Co., Ltd 5// 6// Authors: David Yang <yangxiaohua@everest-semi.com> 7// 8 9#include <linux/clk.h> 10#include <linux/i2c.h> 11#include <linux/interrupt.h> 12#include <linux/irq.h> 13#include <linux/module.h> 14#include <sound/jack.h> 15#include <sound/pcm_params.h> 16#include <sound/soc.h> 17#include <sound/soc-dapm.h> 18#include <sound/tlv.h> 19#include "es8326.h" 20 21struct es8326_priv { 22 struct clk *mclk; 23 struct i2c_client *i2c; 24 struct regmap *regmap; 25 struct snd_soc_component *component; 26 struct delayed_work jack_detect_work; 27 struct delayed_work button_press_work; 28 struct snd_soc_jack *jack; 29 int irq; 30 /* The lock protects the situation that an irq is generated 31 * while enabling or disabling or during an irq. 32 */ 33 struct mutex lock; 34 u8 mic1_src; 35 u8 mic2_src; 36 u8 jack_pol; 37 u8 interrupt_src; 38 u8 interrupt_clk; 39 bool jd_inverted; 40 unsigned int sysclk; 41 42 bool calibrated; 43 int version; 44 int hp; 45 int jack_remove_retry; 46}; 47 48static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 49static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 50static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0); 51static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0); 52static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0); 53static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0); 54static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0); 55 56static const char *const winsize[] = { 57 "0.25db/2 LRCK", 58 "0.25db/4 LRCK", 59 "0.25db/8 LRCK", 60 "0.25db/16 LRCK", 61 "0.25db/32 LRCK", 62 "0.25db/64 LRCK", 63 "0.25db/128 LRCK", 64 "0.25db/256 LRCK", 65 "0.25db/512 LRCK", 66 "0.25db/1024 LRCK", 67 "0.25db/2048 LRCK", 68 "0.25db/4096 LRCK", 69 "0.25db/8192 LRCK", 70 "0.25db/16384 LRCK", 71 "0.25db/32768 LRCK", 72 "0.25db/65536 LRCK", 73}; 74 75static const char *const dacpol_txt[] = { 76 "Normal", "R Invert", "L Invert", "L + R Invert" }; 77 78static const struct soc_enum dacpol = 79 SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt); 80static const struct soc_enum alc_winsize = 81 SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize); 82static const struct soc_enum drc_winsize = 83 SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize); 84 85static const struct snd_kcontrol_new es8326_snd_controls[] = { 86 SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DAC_VOL, 0, 0xbf, 0, dac_vol_tlv), 87 SOC_ENUM("Playback Polarity", dacpol), 88 SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 89 SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv), 90 SOC_ENUM("DRC Winsize", drc_winsize), 91 SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv), 92 93 SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0, 94 adc_vol_tlv), 95 SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv), 96 SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv), 97 SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 98 SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0), 99 SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL, 100 0, 4, 0, drc_recovery_tlv), 101 SOC_ENUM("ALC Capture Winsize", alc_winsize), 102 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL, 103 0, 0x0f, 0, drc_target_tlv), 104 105}; 106 107static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { 108 SND_SOC_DAPM_INPUT("MIC1"), 109 SND_SOC_DAPM_INPUT("MIC2"), 110 SND_SOC_DAPM_INPUT("MIC3"), 111 SND_SOC_DAPM_INPUT("MIC4"), 112 113 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 114 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 115 116 /* Digital Interface */ 117 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0), 118 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0), 119 120 /* ADC Digital Mute */ 121 SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0), 122 SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0), 123 SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0), 124 SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0), 125 126 /* Analog Power Supply*/ 127 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1), 128 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1), 129 SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0), 130 SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0), 131 132 SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0), 133 SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0), 134 135 SND_SOC_DAPM_OUTPUT("HPOL"), 136 SND_SOC_DAPM_OUTPUT("HPOR"), 137}; 138 139static const struct snd_soc_dapm_route es8326_dapm_routes[] = { 140 {"ADC L1", NULL, "MIC1"}, 141 {"ADC R1", NULL, "MIC2"}, 142 {"ADC L2", NULL, "MIC3"}, 143 {"ADC R2", NULL, "MIC4"}, 144 145 {"ADC L", NULL, "ADC L1"}, 146 {"ADC R", NULL, "ADC R1"}, 147 {"ADC L", NULL, "ADC L2"}, 148 {"ADC R", NULL, "ADC R2"}, 149 150 {"I2S OUT", NULL, "ADC L"}, 151 {"I2S OUT", NULL, "ADC R"}, 152 153 {"Right DAC", NULL, "I2S IN"}, 154 {"Left DAC", NULL, "I2S IN"}, 155 156 {"LHPMIX", NULL, "Left DAC"}, 157 {"RHPMIX", NULL, "Right DAC"}, 158 159 {"HPOL", NULL, "LHPMIX"}, 160 {"HPOR", NULL, "RHPMIX"}, 161}; 162 163static bool es8326_volatile_register(struct device *dev, unsigned int reg) 164{ 165 switch (reg) { 166 case ES8326_HPL_OFFSET_INI: 167 case ES8326_HPR_OFFSET_INI: 168 case ES8326_HPDET_STA: 169 case ES8326_CTIA_OMTP_STA: 170 case ES8326_CSM_MUTE_STA: 171 return true; 172 default: 173 return false; 174 } 175} 176 177static const struct regmap_config es8326_regmap_config = { 178 .reg_bits = 8, 179 .val_bits = 8, 180 .max_register = 0xff, 181 .volatile_reg = es8326_volatile_register, 182 .cache_type = REGCACHE_RBTREE, 183}; 184 185struct _coeff_div { 186 u16 fs; 187 u32 rate; 188 u32 mclk; 189 u8 reg4; 190 u8 reg5; 191 u8 reg6; 192 u8 reg7; 193 u8 reg8; 194 u8 reg9; 195 u8 rega; 196 u8 regb; 197}; 198 199/* codec hifi mclk clock divider coefficients */ 200/* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */ 201static const struct _coeff_div coeff_div[] = { 202 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 203 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 204 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 205 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 206 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 207 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 208 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 209 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 210 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 211 {64, 8000, 512000, 0x60, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 212 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 213 214 {64, 44100, 2822400, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 215 {64, 48000, 3072000, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 216 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 217 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 218 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 219 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 220 {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0x38, 0x08, 0x4f, 0x1f}, 221 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 222 {128, 8000, 1024000, 0x60, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 223 {128, 16000, 2048000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 224 225 {128, 44100, 5644800, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 226 {128, 48000, 6144000, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 227 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 228 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 229 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 230 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 231 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 232 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 233 {256, 8000, 2048000, 0x60, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 234 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 235 236 {256, 44100, 11289600, 0x00, 0x00, 0x10, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 237 {256, 48000, 12288000, 0x00, 0x00, 0x30, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 238 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 239 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 240 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 241 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 242 {400, 48000, 19200000, 0x09, 0x04, 0x0f, 0x6d, 0x3a, 0x0A, 0x4F, 0x1F}, 243 {500, 48000, 24000000, 0x18, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 244 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 245 {512, 16000, 8192000, 0x20, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 246 247 {512, 44100, 22579200, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 248 {512, 48000, 24576000, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 249 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 250 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 251 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 252 {1024, 8000, 8192000, 0x60, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 253 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 254 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 255 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 256 257 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 258 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 259 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 260 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 261 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x5F}, 262 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 263 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 264 265}; 266 267static inline int get_coeff(int mclk, int rate) 268{ 269 int i; 270 271 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 272 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 273 return i; 274 } 275 276 return -EINVAL; 277} 278 279static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai, 280 int clk_id, unsigned int freq, int dir) 281{ 282 struct snd_soc_component *codec = codec_dai->component; 283 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 284 285 es8326->sysclk = freq; 286 287 return 0; 288} 289 290static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 291{ 292 struct snd_soc_component *component = codec_dai->component; 293 u8 iface = 0; 294 295 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 296 case SND_SOC_DAIFMT_CBC_CFP: 297 snd_soc_component_update_bits(component, ES8326_RESET, 298 ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN); 299 break; 300 case SND_SOC_DAIFMT_CBC_CFC: 301 break; 302 default: 303 return -EINVAL; 304 } 305 306 /* interface format */ 307 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 308 case SND_SOC_DAIFMT_I2S: 309 break; 310 case SND_SOC_DAIFMT_RIGHT_J: 311 dev_err(component->dev, "Codec driver does not support right justified\n"); 312 return -EINVAL; 313 case SND_SOC_DAIFMT_LEFT_J: 314 iface |= ES8326_DAIFMT_LEFT_J; 315 break; 316 case SND_SOC_DAIFMT_DSP_A: 317 iface |= ES8326_DAIFMT_DSP_A; 318 break; 319 case SND_SOC_DAIFMT_DSP_B: 320 iface |= ES8326_DAIFMT_DSP_B; 321 break; 322 default: 323 return -EINVAL; 324 } 325 326 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface); 327 328 return 0; 329} 330 331static int es8326_pcm_hw_params(struct snd_pcm_substream *substream, 332 struct snd_pcm_hw_params *params, 333 struct snd_soc_dai *dai) 334{ 335 struct snd_soc_component *component = dai->component; 336 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 337 u8 srate = 0; 338 int coeff; 339 340 coeff = get_coeff(es8326->sysclk, params_rate(params)); 341 /* bit size */ 342 switch (params_format(params)) { 343 case SNDRV_PCM_FORMAT_S16_LE: 344 srate |= ES8326_S16_LE; 345 break; 346 case SNDRV_PCM_FORMAT_S20_3LE: 347 srate |= ES8326_S20_3_LE; 348 break; 349 case SNDRV_PCM_FORMAT_S18_3LE: 350 srate |= ES8326_S18_LE; 351 break; 352 case SNDRV_PCM_FORMAT_S24_LE: 353 srate |= ES8326_S24_LE; 354 break; 355 case SNDRV_PCM_FORMAT_S32_LE: 356 srate |= ES8326_S32_LE; 357 break; 358 default: 359 return -EINVAL; 360 } 361 362 /* set iface & srate */ 363 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate); 364 365 if (coeff >= 0) { 366 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 367 coeff_div[coeff].reg4); 368 regmap_write(es8326->regmap, ES8326_CLK_DIV2, 369 coeff_div[coeff].reg5); 370 regmap_write(es8326->regmap, ES8326_CLK_DLL, 371 coeff_div[coeff].reg6); 372 regmap_write(es8326->regmap, ES8326_CLK_MUX, 373 coeff_div[coeff].reg7); 374 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, 375 coeff_div[coeff].reg8); 376 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 377 coeff_div[coeff].reg9); 378 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, 379 coeff_div[coeff].rega); 380 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR, 381 coeff_div[coeff].regb); 382 } else { 383 dev_warn(component->dev, "Clock coefficients do not match"); 384 } 385 386 return 0; 387} 388 389static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction) 390{ 391 struct snd_soc_component *component = dai->component; 392 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 393 unsigned int offset_l, offset_r; 394 395 if (mute) { 396 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 397 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 398 ES8326_MUTE_MASK, ES8326_MUTE); 399 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0); 400 } else { 401 if (!es8326->calibrated) { 402 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL); 403 msleep(30); 404 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 405 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l); 406 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r); 407 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); 408 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l); 409 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r); 410 es8326->calibrated = true; 411 } 412 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa0); 413 regmap_write(es8326->regmap, ES8326_HP_VOL, 0x80); 414 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 415 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 416 ES8326_MUTE_MASK, ~(ES8326_MUTE)); 417 } 418 return 0; 419} 420 421static int es8326_set_bias_level(struct snd_soc_component *codec, 422 enum snd_soc_bias_level level) 423{ 424 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 425 int ret; 426 427 switch (level) { 428 case SND_SOC_BIAS_ON: 429 ret = clk_prepare_enable(es8326->mclk); 430 if (ret) 431 return ret; 432 433 regmap_write(es8326->regmap, ES8326_RESET, 0x9f); 434 msleep(20); 435 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00); 436 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); 437 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 438 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 439 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E); 440 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); 441 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00); 442 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20); 443 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 444 break; 445 case SND_SOC_BIAS_PREPARE: 446 break; 447 case SND_SOC_BIAS_STANDBY: 448 break; 449 case SND_SOC_BIAS_OFF: 450 clk_disable_unprepare(es8326->mclk); 451 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 452 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00); 453 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00); 454 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); 455 break; 456 } 457 458 return 0; 459} 460 461#define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 462 SNDRV_PCM_FMTBIT_S24_LE) 463 464static const struct snd_soc_dai_ops es8326_ops = { 465 .hw_params = es8326_pcm_hw_params, 466 .set_fmt = es8326_set_dai_fmt, 467 .set_sysclk = es8326_set_dai_sysclk, 468 .mute_stream = es8326_mute, 469 .no_capture_mute = 1, 470}; 471 472static struct snd_soc_dai_driver es8326_dai = { 473 .name = "ES8326 HiFi", 474 .playback = { 475 .stream_name = "Playback", 476 .channels_min = 1, 477 .channels_max = 2, 478 .rates = SNDRV_PCM_RATE_8000_48000, 479 .formats = es8326_FORMATS, 480 }, 481 .capture = { 482 .stream_name = "Capture", 483 .channels_min = 1, 484 .channels_max = 2, 485 .rates = SNDRV_PCM_RATE_8000_48000, 486 .formats = es8326_FORMATS, 487 }, 488 .ops = &es8326_ops, 489 .symmetric_rate = 1, 490}; 491 492static void es8326_enable_micbias(struct snd_soc_component *component) 493{ 494 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 495 496 snd_soc_dapm_mutex_lock(dapm); 497 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1"); 498 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2"); 499 snd_soc_dapm_sync_unlocked(dapm); 500 snd_soc_dapm_mutex_unlock(dapm); 501} 502 503static void es8326_disable_micbias(struct snd_soc_component *component) 504{ 505 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 506 507 snd_soc_dapm_mutex_lock(dapm); 508 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1"); 509 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2"); 510 snd_soc_dapm_sync_unlocked(dapm); 511 snd_soc_dapm_mutex_unlock(dapm); 512} 513 514/* 515 * For button detection, set the following in soundcard 516 * snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 517 * snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP); 518 * snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); 519 */ 520static void es8326_jack_button_handler(struct work_struct *work) 521{ 522 struct es8326_priv *es8326 = 523 container_of(work, struct es8326_priv, button_press_work.work); 524 struct snd_soc_component *comp = es8326->component; 525 unsigned int iface; 526 static int button_to_report, press_count; 527 static int prev_button, cur_button; 528 529 if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */ 530 return; 531 532 mutex_lock(&es8326->lock); 533 iface = snd_soc_component_read(comp, ES8326_HPDET_STA); 534 switch (iface) { 535 case 0x93: 536 /* pause button detected */ 537 cur_button = SND_JACK_BTN_0; 538 break; 539 case 0x6f: 540 case 0x4b: 541 /* button volume up */ 542 cur_button = SND_JACK_BTN_1; 543 break; 544 case 0x27: 545 /* button volume down */ 546 cur_button = SND_JACK_BTN_2; 547 break; 548 case 0x1e: 549 case 0xe2: 550 /* button released or not pressed */ 551 cur_button = 0; 552 break; 553 default: 554 break; 555 } 556 557 if ((prev_button == cur_button) && (cur_button != 0)) { 558 press_count++; 559 if (press_count > 3) { 560 /* report a press every 120ms */ 561 snd_soc_jack_report(es8326->jack, cur_button, 562 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 563 press_count = 0; 564 } 565 button_to_report = cur_button; 566 queue_delayed_work(system_wq, &es8326->button_press_work, 567 msecs_to_jiffies(35)); 568 } else if (prev_button != cur_button) { 569 /* mismatch, detect again */ 570 prev_button = cur_button; 571 queue_delayed_work(system_wq, &es8326->button_press_work, 572 msecs_to_jiffies(35)); 573 } else { 574 /* released or no pressed */ 575 if (button_to_report != 0) { 576 snd_soc_jack_report(es8326->jack, button_to_report, 577 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 578 snd_soc_jack_report(es8326->jack, 0, 579 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 580 button_to_report = 0; 581 } 582 } 583 mutex_unlock(&es8326->lock); 584} 585 586static void es8326_jack_detect_handler(struct work_struct *work) 587{ 588 struct es8326_priv *es8326 = 589 container_of(work, struct es8326_priv, jack_detect_work.work); 590 struct snd_soc_component *comp = es8326->component; 591 unsigned int iface; 592 593 mutex_lock(&es8326->lock); 594 iface = snd_soc_component_read(comp, ES8326_HPDET_STA); 595 dev_dbg(comp->dev, "gpio flag %#04x", iface); 596 597 if (es8326->jack_remove_retry == 1) { 598 if (iface & ES8326_HPINSERT_FLAG) 599 es8326->jack_remove_retry = 2; 600 else 601 es8326->jack_remove_retry = 0; 602 603 dev_dbg(comp->dev, "remove event check, set HPJACK_POL normal, cnt = %d\n", 604 es8326->jack_remove_retry); 605 /* 606 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event 607 */ 608 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 609 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ? 610 ~es8326->jack_pol : es8326->jack_pol)); 611 goto exit; 612 } 613 614 if ((iface & ES8326_HPINSERT_FLAG) == 0) { 615 /* Jack unplugged or spurious IRQ */ 616 dev_dbg(comp->dev, "No headset detected\n"); 617 es8326_disable_micbias(es8326->component); 618 if (es8326->jack->status & SND_JACK_HEADPHONE) { 619 dev_dbg(comp->dev, "Report hp remove event\n"); 620 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 621 /* mute adc when mic path switch */ 622 regmap_write(es8326->regmap, ES8326_ADC_SCALE, 0x33); 623 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44); 624 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66); 625 es8326->hp = 0; 626 } 627 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 628 /* 629 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event 630 */ 631 if (es8326->jack_remove_retry == 0) { 632 es8326->jack_remove_retry = 1; 633 dev_dbg(comp->dev, "remove event check, invert HPJACK_POL, cnt = %d\n", 634 es8326->jack_remove_retry); 635 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 636 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ? 637 es8326->jack_pol : ~es8326->jack_pol)); 638 639 } else { 640 es8326->jack_remove_retry = 0; 641 } 642 } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) { 643 es8326->jack_remove_retry = 0; 644 if (es8326->hp == 0) { 645 dev_dbg(comp->dev, "First insert, start OMTP/CTIA type check\n"); 646 /* 647 * set auto-check mode, then restart jack_detect_work after 100ms. 648 * Don't report jack status. 649 */ 650 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 651 usleep_range(50000, 70000); 652 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 653 queue_delayed_work(system_wq, &es8326->jack_detect_work, 654 msecs_to_jiffies(100)); 655 es8326->hp = 1; 656 goto exit; 657 } 658 if (es8326->jack->status & SND_JACK_HEADSET) { 659 /* detect button */ 660 dev_dbg(comp->dev, "button pressed\n"); 661 queue_delayed_work(system_wq, &es8326->button_press_work, 10); 662 goto exit; 663 } 664 if ((iface & ES8326_HPBUTTON_FLAG) == 0x01) { 665 dev_dbg(comp->dev, "Headphone detected\n"); 666 snd_soc_jack_report(es8326->jack, 667 SND_JACK_HEADPHONE, SND_JACK_HEADSET); 668 } else { 669 dev_dbg(comp->dev, "Headset detected\n"); 670 snd_soc_jack_report(es8326->jack, 671 SND_JACK_HEADSET, SND_JACK_HEADSET); 672 673 regmap_write(es8326->regmap, ES8326_ADC_SCALE, 0x33); 674 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN, 675 0x08, 0x08); 676 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, 677 0x80, 0x80); 678 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x00); 679 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x00); 680 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN, 681 0x08, 0x00); 682 usleep_range(10000, 15000); 683 } 684 } 685exit: 686 mutex_unlock(&es8326->lock); 687} 688 689static irqreturn_t es8326_irq(int irq, void *dev_id) 690{ 691 struct es8326_priv *es8326 = dev_id; 692 struct snd_soc_component *comp = es8326->component; 693 694 if (!es8326->jack) 695 goto out; 696 697 es8326_enable_micbias(comp); 698 699 if (es8326->jack->status & SND_JACK_HEADSET) 700 queue_delayed_work(system_wq, &es8326->jack_detect_work, 701 msecs_to_jiffies(10)); 702 else 703 queue_delayed_work(system_wq, &es8326->jack_detect_work, 704 msecs_to_jiffies(600)); 705 706out: 707 return IRQ_HANDLED; 708} 709 710static int es8326_calibrate(struct snd_soc_component *component) 711{ 712 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 713 unsigned int reg; 714 unsigned int offset_l, offset_r; 715 716 regmap_read(es8326->regmap, ES8326_CHIP_VERSION, ®); 717 es8326->version = reg; 718 719 if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) { 720 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n"); 721 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0); 722 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x01); 723 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30); 724 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed); 725 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1); 726 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03); 727 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f); 728 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x33); 729 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88); 730 regmap_write(es8326->regmap, ES8326_HP_VOL, 0x80); 731 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); 732 regmap_write(es8326->regmap, ES8326_RESET, 0xc0); 733 usleep_range(15000, 20000); 734 735 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, ES8326_HP_OFF); 736 regmap_read(es8326->regmap, ES8326_CSM_MUTE_STA, ®); 737 if ((reg & 0xf0) != 0x40) 738 msleep(50); 739 740 regmap_write(es8326->regmap, ES8326_HP_CAL, 0xd4); 741 msleep(200); 742 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x4d); 743 msleep(200); 744 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 745 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l); 746 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r); 747 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); 748 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l); 749 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r); 750 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); 751 752 es8326->calibrated = true; 753 } 754 755 return 0; 756} 757 758static int es8326_resume(struct snd_soc_component *component) 759{ 760 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 761 762 regcache_cache_only(es8326->regmap, false); 763 regcache_sync(es8326->regmap); 764 765 /* reset internal clock state */ 766 regmap_write(es8326->regmap, ES8326_RESET, 0x1f); 767 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E); 768 usleep_range(10000, 15000); 769 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0x88); 770 /* set headphone default type and detect pin */ 771 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x81); 772 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); 773 774 /* set internal oscillator as clock source of headpone cp */ 775 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x84); 776 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON); 777 /* clock manager reset release */ 778 regmap_write(es8326->regmap, ES8326_RESET, 0x17); 779 /* set headphone detection as half scan mode */ 780 regmap_write(es8326->regmap, ES8326_HP_MISC, 0x08); 781 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00); 782 783 /* enable headphone driver */ 784 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7); 785 usleep_range(2000, 5000); 786 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xab); 787 usleep_range(2000, 5000); 788 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xbb); 789 usleep_range(2000, 5000); 790 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 791 792 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); 793 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xc4); 794 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x81); 795 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00); 796 /* calibrate for B version */ 797 es8326_calibrate(component); 798 /* turn off headphone out */ 799 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00); 800 /* set ADC and DAC in low power mode */ 801 regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0); 802 803 /* force micbias on */ 804 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0x4f); 805 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x08); 806 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F); 807 /* select vdda as micbias source */ 808 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23); 809 /* set dac dsmclip = 1 */ 810 regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08); 811 regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15); 812 813 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 814 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON)); 815 regmap_write(es8326->regmap, ES8326_INTOUT_IO, 816 es8326->interrupt_clk); 817 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 818 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 819 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 820 821 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 822 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 823 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK, 824 ES8326_MIC1_SEL); 825 826 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK, 827 ES8326_MUTE); 828 829 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 | 830 ((es8326->version == ES8326_VERSION_B) ? 831 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) : 832 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04))); 833 834 es8326->jack_remove_retry = 0; 835 es8326->hp = 0; 836 return 0; 837} 838 839static int es8326_suspend(struct snd_soc_component *component) 840{ 841 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 842 843 cancel_delayed_work_sync(&es8326->jack_detect_work); 844 es8326_disable_micbias(component); 845 es8326->calibrated = false; 846 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF); 847 regcache_cache_only(es8326->regmap, true); 848 regcache_mark_dirty(es8326->regmap); 849 850 /* reset register value to default */ 851 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01); 852 usleep_range(1000, 3000); 853 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00); 854 return 0; 855} 856 857static int es8326_probe(struct snd_soc_component *component) 858{ 859 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 860 int ret; 861 862 es8326->component = component; 863 es8326->jd_inverted = device_property_read_bool(component->dev, 864 "everest,jack-detect-inverted"); 865 866 ret = device_property_read_u8(component->dev, "everest,mic1-src", &es8326->mic1_src); 867 if (ret != 0) { 868 dev_dbg(component->dev, "mic1-src return %d", ret); 869 es8326->mic1_src = ES8326_ADC_AMIC; 870 } 871 dev_dbg(component->dev, "mic1-src %x", es8326->mic1_src); 872 873 ret = device_property_read_u8(component->dev, "everest,mic2-src", &es8326->mic2_src); 874 if (ret != 0) { 875 dev_dbg(component->dev, "mic2-src return %d", ret); 876 es8326->mic2_src = ES8326_ADC_DMIC; 877 } 878 dev_dbg(component->dev, "mic2-src %x", es8326->mic2_src); 879 880 ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol); 881 if (ret != 0) { 882 dev_dbg(component->dev, "jack-pol return %d", ret); 883 es8326->jack_pol = ES8326_HP_TYPE_AUTO; 884 } 885 dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol); 886 887 ret = device_property_read_u8(component->dev, "everest,interrupt-src", 888 &es8326->interrupt_src); 889 if (ret != 0) { 890 dev_dbg(component->dev, "interrupt-src return %d", ret); 891 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9; 892 } 893 dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src); 894 895 ret = device_property_read_u8(component->dev, "everest,interrupt-clk", 896 &es8326->interrupt_clk); 897 if (ret != 0) { 898 dev_dbg(component->dev, "interrupt-clk return %d", ret); 899 es8326->interrupt_clk = 0x45; 900 } 901 dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk); 902 903 es8326_resume(component); 904 return 0; 905} 906 907static void es8326_enable_jack_detect(struct snd_soc_component *component, 908 struct snd_soc_jack *jack) 909{ 910 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 911 912 mutex_lock(&es8326->lock); 913 if (es8326->jd_inverted) 914 snd_soc_component_update_bits(component, ES8326_HPDET_TYPE, 915 ES8326_HP_DET_JACK_POL, ~es8326->jack_pol); 916 es8326->jack = jack; 917 918 mutex_unlock(&es8326->lock); 919 es8326_irq(es8326->irq, es8326); 920} 921 922static void es8326_disable_jack_detect(struct snd_soc_component *component) 923{ 924 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 925 926 dev_dbg(component->dev, "Enter into %s\n", __func__); 927 if (!es8326->jack) 928 return; /* Already disabled (or never enabled) */ 929 cancel_delayed_work_sync(&es8326->jack_detect_work); 930 931 mutex_lock(&es8326->lock); 932 if (es8326->jack->status & SND_JACK_MICROPHONE) { 933 es8326_disable_micbias(component); 934 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 935 } 936 es8326->jack = NULL; 937 mutex_unlock(&es8326->lock); 938} 939 940static int es8326_set_jack(struct snd_soc_component *component, 941 struct snd_soc_jack *jack, void *data) 942{ 943 if (jack) 944 es8326_enable_jack_detect(component, jack); 945 else 946 es8326_disable_jack_detect(component); 947 948 return 0; 949} 950 951static void es8326_remove(struct snd_soc_component *component) 952{ 953 es8326_disable_jack_detect(component); 954 es8326_set_bias_level(component, SND_SOC_BIAS_OFF); 955} 956 957static const struct snd_soc_component_driver soc_component_dev_es8326 = { 958 .probe = es8326_probe, 959 .remove = es8326_remove, 960 .resume = es8326_resume, 961 .suspend = es8326_suspend, 962 .set_bias_level = es8326_set_bias_level, 963 .set_jack = es8326_set_jack, 964 .dapm_widgets = es8326_dapm_widgets, 965 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets), 966 .dapm_routes = es8326_dapm_routes, 967 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes), 968 .controls = es8326_snd_controls, 969 .num_controls = ARRAY_SIZE(es8326_snd_controls), 970 .use_pmdown_time = 1, 971 .endianness = 1, 972}; 973 974static int es8326_i2c_probe(struct i2c_client *i2c) 975{ 976 struct es8326_priv *es8326; 977 int ret; 978 979 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL); 980 if (!es8326) 981 return -ENOMEM; 982 983 i2c_set_clientdata(i2c, es8326); 984 es8326->i2c = i2c; 985 mutex_init(&es8326->lock); 986 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config); 987 if (IS_ERR(es8326->regmap)) { 988 ret = PTR_ERR(es8326->regmap); 989 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret); 990 return ret; 991 } 992 993 es8326->irq = i2c->irq; 994 INIT_DELAYED_WORK(&es8326->jack_detect_work, 995 es8326_jack_detect_handler); 996 INIT_DELAYED_WORK(&es8326->button_press_work, 997 es8326_jack_button_handler); 998 /* ES8316 is level-based while ES8326 is edge-based */ 999 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq, 1000 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 1001 "es8326", es8326); 1002 if (ret) { 1003 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n", 1004 es8326->irq, ret); 1005 es8326->irq = -ENXIO; 1006 } 1007 1008 es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk"); 1009 if (IS_ERR(es8326->mclk)) { 1010 dev_err(&i2c->dev, "unable to get mclk\n"); 1011 return PTR_ERR(es8326->mclk); 1012 } 1013 if (!es8326->mclk) 1014 dev_warn(&i2c->dev, "assuming static mclk\n"); 1015 1016 ret = clk_prepare_enable(es8326->mclk); 1017 if (ret) { 1018 dev_err(&i2c->dev, "unable to enable mclk\n"); 1019 return ret; 1020 } 1021 return devm_snd_soc_register_component(&i2c->dev, 1022 &soc_component_dev_es8326, 1023 &es8326_dai, 1); 1024} 1025 1026static const struct i2c_device_id es8326_i2c_id[] = { 1027 {"es8326", 0 }, 1028 {} 1029}; 1030MODULE_DEVICE_TABLE(i2c, es8326_i2c_id); 1031 1032#ifdef CONFIG_OF 1033static const struct of_device_id es8326_of_match[] = { 1034 { .compatible = "everest,es8326", }, 1035 {} 1036}; 1037MODULE_DEVICE_TABLE(of, es8326_of_match); 1038#endif 1039 1040#ifdef CONFIG_ACPI 1041static const struct acpi_device_id es8326_acpi_match[] = { 1042 {"ESSX8326", 0}, 1043 {}, 1044}; 1045MODULE_DEVICE_TABLE(acpi, es8326_acpi_match); 1046#endif 1047 1048static struct i2c_driver es8326_i2c_driver = { 1049 .driver = { 1050 .name = "es8326", 1051 .acpi_match_table = ACPI_PTR(es8326_acpi_match), 1052 .of_match_table = of_match_ptr(es8326_of_match), 1053 }, 1054 .probe = es8326_i2c_probe, 1055 .id_table = es8326_i2c_id, 1056}; 1057module_i2c_driver(es8326_i2c_driver); 1058 1059MODULE_DESCRIPTION("ASoC es8326 driver"); 1060MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>"); 1061MODULE_LICENSE("GPL"); 1062