162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2005 SAN People 662306a36Sopenharmony_ci * Copyright (C) 2008 Atmel 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com> 962306a36Sopenharmony_ci * ATMEL CORP. 1062306a36Sopenharmony_ci * 1162306a36Sopenharmony_ci * Based on at91-ssc.c by 1262306a36Sopenharmony_ci * Frank Mandarino <fmandarino@endrelia.com> 1362306a36Sopenharmony_ci * Based on pxa2xx Platform drivers by 1462306a36Sopenharmony_ci * Liam Girdwood <lrg@slimlogic.co.uk> 1562306a36Sopenharmony_ci */ 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci#ifndef _ATMEL_SSC_DAI_H 1862306a36Sopenharmony_ci#define _ATMEL_SSC_DAI_H 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci#include <linux/types.h> 2162306a36Sopenharmony_ci#include <linux/atmel-ssc.h> 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci#include "atmel-pcm.h" 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci/* SSC system clock ids */ 2662306a36Sopenharmony_ci#define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */ 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci/* SSC divider ids */ 2962306a36Sopenharmony_ci#define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */ 3062306a36Sopenharmony_ci#define ATMEL_SSC_TCMR_PERIOD 1 /* BCLK divider for transmit FS */ 3162306a36Sopenharmony_ci#define ATMEL_SSC_RCMR_PERIOD 2 /* BCLK divider for receive FS */ 3262306a36Sopenharmony_ci/* 3362306a36Sopenharmony_ci * SSC direction masks 3462306a36Sopenharmony_ci */ 3562306a36Sopenharmony_ci#define SSC_DIR_MASK_UNUSED 0 3662306a36Sopenharmony_ci#define SSC_DIR_MASK_PLAYBACK 1 3762306a36Sopenharmony_ci#define SSC_DIR_MASK_CAPTURE 2 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci/* 4062306a36Sopenharmony_ci * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These 4162306a36Sopenharmony_ci * are expected to be used with SSC_BF 4262306a36Sopenharmony_ci */ 4362306a36Sopenharmony_ci/* START bit field values */ 4462306a36Sopenharmony_ci#define SSC_START_CONTINUOUS 0 4562306a36Sopenharmony_ci#define SSC_START_TX_RX 1 4662306a36Sopenharmony_ci#define SSC_START_LOW_RF 2 4762306a36Sopenharmony_ci#define SSC_START_HIGH_RF 3 4862306a36Sopenharmony_ci#define SSC_START_FALLING_RF 4 4962306a36Sopenharmony_ci#define SSC_START_RISING_RF 5 5062306a36Sopenharmony_ci#define SSC_START_LEVEL_RF 6 5162306a36Sopenharmony_ci#define SSC_START_EDGE_RF 7 5262306a36Sopenharmony_ci#define SSS_START_COMPARE_0 8 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci/* CKI bit field values */ 5562306a36Sopenharmony_ci#define SSC_CKI_FALLING 0 5662306a36Sopenharmony_ci#define SSC_CKI_RISING 1 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci/* CKO bit field values */ 5962306a36Sopenharmony_ci#define SSC_CKO_NONE 0 6062306a36Sopenharmony_ci#define SSC_CKO_CONTINUOUS 1 6162306a36Sopenharmony_ci#define SSC_CKO_TRANSFER 2 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci/* CKS bit field values */ 6462306a36Sopenharmony_ci#define SSC_CKS_DIV 0 6562306a36Sopenharmony_ci#define SSC_CKS_CLOCK 1 6662306a36Sopenharmony_ci#define SSC_CKS_PIN 2 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci/* FSEDGE bit field values */ 6962306a36Sopenharmony_ci#define SSC_FSEDGE_POSITIVE 0 7062306a36Sopenharmony_ci#define SSC_FSEDGE_NEGATIVE 1 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci/* FSOS bit field values */ 7362306a36Sopenharmony_ci#define SSC_FSOS_NONE 0 7462306a36Sopenharmony_ci#define SSC_FSOS_NEGATIVE 1 7562306a36Sopenharmony_ci#define SSC_FSOS_POSITIVE 2 7662306a36Sopenharmony_ci#define SSC_FSOS_LOW 3 7762306a36Sopenharmony_ci#define SSC_FSOS_HIGH 4 7862306a36Sopenharmony_ci#define SSC_FSOS_TOGGLE 5 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci#define START_DELAY 1 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_cistruct atmel_ssc_state { 8362306a36Sopenharmony_ci u32 ssc_cmr; 8462306a36Sopenharmony_ci u32 ssc_rcmr; 8562306a36Sopenharmony_ci u32 ssc_rfmr; 8662306a36Sopenharmony_ci u32 ssc_tcmr; 8762306a36Sopenharmony_ci u32 ssc_tfmr; 8862306a36Sopenharmony_ci u32 ssc_sr; 8962306a36Sopenharmony_ci u32 ssc_imr; 9062306a36Sopenharmony_ci}; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_cistruct atmel_ssc_info { 9462306a36Sopenharmony_ci char *name; 9562306a36Sopenharmony_ci struct ssc_device *ssc; 9662306a36Sopenharmony_ci unsigned short dir_mask; /* 0=unused, 1=playback, 2=capture */ 9762306a36Sopenharmony_ci unsigned short initialized; /* true if SSC has been initialized */ 9862306a36Sopenharmony_ci unsigned short daifmt; 9962306a36Sopenharmony_ci unsigned short cmr_div; 10062306a36Sopenharmony_ci unsigned short tcmr_period; 10162306a36Sopenharmony_ci unsigned short rcmr_period; 10262306a36Sopenharmony_ci unsigned int forced_divider; 10362306a36Sopenharmony_ci struct atmel_pcm_dma_params *dma_params[2]; 10462306a36Sopenharmony_ci struct atmel_ssc_state ssc_state; 10562306a36Sopenharmony_ci unsigned long mck_rate; 10662306a36Sopenharmony_ci}; 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ciint atmel_ssc_set_audio(int ssc_id); 10962306a36Sopenharmony_civoid atmel_ssc_put_audio(int ssc_id); 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci#endif /* _AT91_SSC_DAI_H */ 112