1// SPDX-License-Identifier: GPL-2.0-only 2/* Analog Devices 1889 audio driver 3 * 4 * This is a driver for the AD1889 PCI audio chipset found 5 * on the HP PA-RISC [BCJ]-xxx0 workstations. 6 * 7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> 8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> 9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> 10 * 11 * TODO: 12 * Do we need to take care of CCS register? 13 * Maybe we could use finer grained locking (separate locks for pb/cap)? 14 * Wishlist: 15 * Control Interface (mixer) support 16 * Better AC97 support (VSR...)? 17 * PM support 18 * MIDI support 19 * Game Port support 20 * SG DMA support (this will need *a lot* of work) 21 */ 22 23#include <linux/init.h> 24#include <linux/pci.h> 25#include <linux/dma-mapping.h> 26#include <linux/slab.h> 27#include <linux/interrupt.h> 28#include <linux/compiler.h> 29#include <linux/delay.h> 30#include <linux/module.h> 31#include <linux/io.h> 32 33#include <sound/core.h> 34#include <sound/pcm.h> 35#include <sound/initval.h> 36#include <sound/ac97_codec.h> 37 38#include "ad1889.h" 39#include "ac97/ac97_id.h" 40 41#define AD1889_DRVVER "Version: 1.7" 42 43MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); 44MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); 45MODULE_LICENSE("GPL"); 46 47static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 48module_param_array(index, int, NULL, 0444); 49MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); 50 51static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 52module_param_array(id, charp, NULL, 0444); 53MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); 54 55static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 56module_param_array(enable, bool, NULL, 0444); 57MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); 58 59static char *ac97_quirk[SNDRV_CARDS]; 60module_param_array(ac97_quirk, charp, NULL, 0444); 61MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 62 63#define DEVNAME "ad1889" 64#define PFX DEVNAME ": " 65 66/* keep track of some hw registers */ 67struct ad1889_register_state { 68 u16 reg; /* reg setup */ 69 u32 addr; /* dma base address */ 70 unsigned long size; /* DMA buffer size */ 71}; 72 73struct snd_ad1889 { 74 struct snd_card *card; 75 struct pci_dev *pci; 76 77 int irq; 78 unsigned long bar; 79 void __iomem *iobase; 80 81 struct snd_ac97 *ac97; 82 struct snd_ac97_bus *ac97_bus; 83 struct snd_pcm *pcm; 84 struct snd_info_entry *proc; 85 86 struct snd_pcm_substream *psubs; 87 struct snd_pcm_substream *csubs; 88 89 /* playback register state */ 90 struct ad1889_register_state wave; 91 struct ad1889_register_state ramc; 92 93 spinlock_t lock; 94}; 95 96static inline u16 97ad1889_readw(struct snd_ad1889 *chip, unsigned reg) 98{ 99 return readw(chip->iobase + reg); 100} 101 102static inline void 103ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) 104{ 105 writew(val, chip->iobase + reg); 106} 107 108static inline u32 109ad1889_readl(struct snd_ad1889 *chip, unsigned reg) 110{ 111 return readl(chip->iobase + reg); 112} 113 114static inline void 115ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) 116{ 117 writel(val, chip->iobase + reg); 118} 119 120static inline void 121ad1889_unmute(struct snd_ad1889 *chip) 122{ 123 u16 st; 124 st = ad1889_readw(chip, AD_DS_WADA) & 125 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); 126 ad1889_writew(chip, AD_DS_WADA, st); 127 ad1889_readw(chip, AD_DS_WADA); 128} 129 130static inline void 131ad1889_mute(struct snd_ad1889 *chip) 132{ 133 u16 st; 134 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; 135 ad1889_writew(chip, AD_DS_WADA, st); 136 ad1889_readw(chip, AD_DS_WADA); 137} 138 139static inline void 140ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) 141{ 142 ad1889_writel(chip, AD_DMA_ADCBA, address); 143 ad1889_writel(chip, AD_DMA_ADCCA, address); 144} 145 146static inline void 147ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) 148{ 149 ad1889_writel(chip, AD_DMA_ADCBC, count); 150 ad1889_writel(chip, AD_DMA_ADCCC, count); 151} 152 153static inline void 154ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) 155{ 156 ad1889_writel(chip, AD_DMA_ADCIB, count); 157 ad1889_writel(chip, AD_DMA_ADCIC, count); 158} 159 160static inline void 161ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) 162{ 163 ad1889_writel(chip, AD_DMA_WAVBA, address); 164 ad1889_writel(chip, AD_DMA_WAVCA, address); 165} 166 167static inline void 168ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) 169{ 170 ad1889_writel(chip, AD_DMA_WAVBC, count); 171 ad1889_writel(chip, AD_DMA_WAVCC, count); 172} 173 174static inline void 175ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) 176{ 177 ad1889_writel(chip, AD_DMA_WAVIB, count); 178 ad1889_writel(chip, AD_DMA_WAVIC, count); 179} 180 181static void 182ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) 183{ 184 u16 reg; 185 186 if (channel & AD_CHAN_WAV) { 187 /* Disable wave channel */ 188 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; 189 ad1889_writew(chip, AD_DS_WSMC, reg); 190 chip->wave.reg = reg; 191 192 /* disable IRQs */ 193 reg = ad1889_readw(chip, AD_DMA_WAV); 194 reg &= AD_DMA_IM_DIS; 195 reg &= ~AD_DMA_LOOP; 196 ad1889_writew(chip, AD_DMA_WAV, reg); 197 198 /* clear IRQ and address counters and pointers */ 199 ad1889_load_wave_buffer_address(chip, 0x0); 200 ad1889_load_wave_buffer_count(chip, 0x0); 201 ad1889_load_wave_interrupt_count(chip, 0x0); 202 203 /* flush */ 204 ad1889_readw(chip, AD_DMA_WAV); 205 } 206 207 if (channel & AD_CHAN_ADC) { 208 /* Disable ADC channel */ 209 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; 210 ad1889_writew(chip, AD_DS_RAMC, reg); 211 chip->ramc.reg = reg; 212 213 reg = ad1889_readw(chip, AD_DMA_ADC); 214 reg &= AD_DMA_IM_DIS; 215 reg &= ~AD_DMA_LOOP; 216 ad1889_writew(chip, AD_DMA_ADC, reg); 217 218 ad1889_load_adc_buffer_address(chip, 0x0); 219 ad1889_load_adc_buffer_count(chip, 0x0); 220 ad1889_load_adc_interrupt_count(chip, 0x0); 221 222 /* flush */ 223 ad1889_readw(chip, AD_DMA_ADC); 224 } 225} 226 227static u16 228snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 229{ 230 struct snd_ad1889 *chip = ac97->private_data; 231 return ad1889_readw(chip, AD_AC97_BASE + reg); 232} 233 234static void 235snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 236{ 237 struct snd_ad1889 *chip = ac97->private_data; 238 ad1889_writew(chip, AD_AC97_BASE + reg, val); 239} 240 241static int 242snd_ad1889_ac97_ready(struct snd_ad1889 *chip) 243{ 244 int retry = 400; /* average needs 352 msec */ 245 246 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) 247 && --retry) 248 usleep_range(1000, 2000); 249 if (!retry) { 250 dev_err(chip->card->dev, "[%s] Link is not ready.\n", 251 __func__); 252 return -EIO; 253 } 254 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry); 255 256 return 0; 257} 258 259static const struct snd_pcm_hardware snd_ad1889_playback_hw = { 260 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 261 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 262 .formats = SNDRV_PCM_FMTBIT_S16_LE, 263 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 264 .rate_min = 8000, /* docs say 7000, but we're lazy */ 265 .rate_max = 48000, 266 .channels_min = 1, 267 .channels_max = 2, 268 .buffer_bytes_max = BUFFER_BYTES_MAX, 269 .period_bytes_min = PERIOD_BYTES_MIN, 270 .period_bytes_max = PERIOD_BYTES_MAX, 271 .periods_min = PERIODS_MIN, 272 .periods_max = PERIODS_MAX, 273 /*.fifo_size = 0,*/ 274}; 275 276static const struct snd_pcm_hardware snd_ad1889_capture_hw = { 277 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 278 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 279 .formats = SNDRV_PCM_FMTBIT_S16_LE, 280 .rates = SNDRV_PCM_RATE_48000, 281 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ 282 .rate_max = 48000, 283 .channels_min = 1, 284 .channels_max = 2, 285 .buffer_bytes_max = BUFFER_BYTES_MAX, 286 .period_bytes_min = PERIOD_BYTES_MIN, 287 .period_bytes_max = PERIOD_BYTES_MAX, 288 .periods_min = PERIODS_MIN, 289 .periods_max = PERIODS_MAX, 290 /*.fifo_size = 0,*/ 291}; 292 293static int 294snd_ad1889_playback_open(struct snd_pcm_substream *ss) 295{ 296 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 297 struct snd_pcm_runtime *rt = ss->runtime; 298 299 chip->psubs = ss; 300 rt->hw = snd_ad1889_playback_hw; 301 302 return 0; 303} 304 305static int 306snd_ad1889_capture_open(struct snd_pcm_substream *ss) 307{ 308 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 309 struct snd_pcm_runtime *rt = ss->runtime; 310 311 chip->csubs = ss; 312 rt->hw = snd_ad1889_capture_hw; 313 314 return 0; 315} 316 317static int 318snd_ad1889_playback_close(struct snd_pcm_substream *ss) 319{ 320 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 321 chip->psubs = NULL; 322 return 0; 323} 324 325static int 326snd_ad1889_capture_close(struct snd_pcm_substream *ss) 327{ 328 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 329 chip->csubs = NULL; 330 return 0; 331} 332 333static int 334snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) 335{ 336 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 337 struct snd_pcm_runtime *rt = ss->runtime; 338 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 339 unsigned int count = snd_pcm_lib_period_bytes(ss); 340 u16 reg; 341 342 ad1889_channel_reset(chip, AD_CHAN_WAV); 343 344 reg = ad1889_readw(chip, AD_DS_WSMC); 345 346 /* Mask out 16-bit / Stereo */ 347 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); 348 349 if (snd_pcm_format_width(rt->format) == 16) 350 reg |= AD_DS_WSMC_WA16; 351 352 if (rt->channels > 1) 353 reg |= AD_DS_WSMC_WAST; 354 355 /* let's make sure we don't clobber ourselves */ 356 spin_lock_irq(&chip->lock); 357 358 chip->wave.size = size; 359 chip->wave.reg = reg; 360 chip->wave.addr = rt->dma_addr; 361 362 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); 363 364 /* Set sample rates on the codec */ 365 ad1889_writew(chip, AD_DS_WAS, rt->rate); 366 367 /* Set up DMA */ 368 ad1889_load_wave_buffer_address(chip, chip->wave.addr); 369 ad1889_load_wave_buffer_count(chip, size); 370 ad1889_load_wave_interrupt_count(chip, count); 371 372 /* writes flush */ 373 ad1889_readw(chip, AD_DS_WSMC); 374 375 spin_unlock_irq(&chip->lock); 376 377 dev_dbg(chip->card->dev, 378 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 379 chip->wave.addr, count, size, reg, rt->rate); 380 return 0; 381} 382 383static int 384snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) 385{ 386 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 387 struct snd_pcm_runtime *rt = ss->runtime; 388 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 389 unsigned int count = snd_pcm_lib_period_bytes(ss); 390 u16 reg; 391 392 ad1889_channel_reset(chip, AD_CHAN_ADC); 393 394 reg = ad1889_readw(chip, AD_DS_RAMC); 395 396 /* Mask out 16-bit / Stereo */ 397 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); 398 399 if (snd_pcm_format_width(rt->format) == 16) 400 reg |= AD_DS_RAMC_AD16; 401 402 if (rt->channels > 1) 403 reg |= AD_DS_RAMC_ADST; 404 405 /* let's make sure we don't clobber ourselves */ 406 spin_lock_irq(&chip->lock); 407 408 chip->ramc.size = size; 409 chip->ramc.reg = reg; 410 chip->ramc.addr = rt->dma_addr; 411 412 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); 413 414 /* Set up DMA */ 415 ad1889_load_adc_buffer_address(chip, chip->ramc.addr); 416 ad1889_load_adc_buffer_count(chip, size); 417 ad1889_load_adc_interrupt_count(chip, count); 418 419 /* writes flush */ 420 ad1889_readw(chip, AD_DS_RAMC); 421 422 spin_unlock_irq(&chip->lock); 423 424 dev_dbg(chip->card->dev, 425 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 426 chip->ramc.addr, count, size, reg, rt->rate); 427 return 0; 428} 429 430/* this is called in atomic context with IRQ disabled. 431 Must be as fast as possible and not sleep. 432 DMA should be *triggered* by this call. 433 The WSMC "WAEN" bit triggers DMA Wave On/Off */ 434static int 435snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) 436{ 437 u16 wsmc; 438 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 439 440 wsmc = ad1889_readw(chip, AD_DS_WSMC); 441 442 switch (cmd) { 443 case SNDRV_PCM_TRIGGER_START: 444 /* enable DMA loop & interrupts */ 445 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); 446 wsmc |= AD_DS_WSMC_WAEN; 447 /* 1 to clear CHSS bit */ 448 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); 449 ad1889_unmute(chip); 450 break; 451 case SNDRV_PCM_TRIGGER_STOP: 452 ad1889_mute(chip); 453 wsmc &= ~AD_DS_WSMC_WAEN; 454 break; 455 default: 456 snd_BUG(); 457 return -EINVAL; 458 } 459 460 chip->wave.reg = wsmc; 461 ad1889_writew(chip, AD_DS_WSMC, wsmc); 462 ad1889_readw(chip, AD_DS_WSMC); /* flush */ 463 464 /* reset the chip when STOP - will disable IRQs */ 465 if (cmd == SNDRV_PCM_TRIGGER_STOP) 466 ad1889_channel_reset(chip, AD_CHAN_WAV); 467 468 return 0; 469} 470 471/* this is called in atomic context with IRQ disabled. 472 Must be as fast as possible and not sleep. 473 DMA should be *triggered* by this call. 474 The RAMC "ADEN" bit triggers DMA ADC On/Off */ 475static int 476snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) 477{ 478 u16 ramc; 479 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 480 481 ramc = ad1889_readw(chip, AD_DS_RAMC); 482 483 switch (cmd) { 484 case SNDRV_PCM_TRIGGER_START: 485 /* enable DMA loop & interrupts */ 486 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); 487 ramc |= AD_DS_RAMC_ADEN; 488 /* 1 to clear CHSS bit */ 489 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); 490 break; 491 case SNDRV_PCM_TRIGGER_STOP: 492 ramc &= ~AD_DS_RAMC_ADEN; 493 break; 494 default: 495 return -EINVAL; 496 } 497 498 chip->ramc.reg = ramc; 499 ad1889_writew(chip, AD_DS_RAMC, ramc); 500 ad1889_readw(chip, AD_DS_RAMC); /* flush */ 501 502 /* reset the chip when STOP - will disable IRQs */ 503 if (cmd == SNDRV_PCM_TRIGGER_STOP) 504 ad1889_channel_reset(chip, AD_CHAN_ADC); 505 506 return 0; 507} 508 509/* Called in atomic context with IRQ disabled */ 510static snd_pcm_uframes_t 511snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) 512{ 513 size_t ptr = 0; 514 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 515 516 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) 517 return 0; 518 519 ptr = ad1889_readl(chip, AD_DMA_WAVCA); 520 ptr -= chip->wave.addr; 521 522 if (snd_BUG_ON(ptr >= chip->wave.size)) 523 return 0; 524 525 return bytes_to_frames(ss->runtime, ptr); 526} 527 528/* Called in atomic context with IRQ disabled */ 529static snd_pcm_uframes_t 530snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) 531{ 532 size_t ptr = 0; 533 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 534 535 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) 536 return 0; 537 538 ptr = ad1889_readl(chip, AD_DMA_ADCCA); 539 ptr -= chip->ramc.addr; 540 541 if (snd_BUG_ON(ptr >= chip->ramc.size)) 542 return 0; 543 544 return bytes_to_frames(ss->runtime, ptr); 545} 546 547static const struct snd_pcm_ops snd_ad1889_playback_ops = { 548 .open = snd_ad1889_playback_open, 549 .close = snd_ad1889_playback_close, 550 .prepare = snd_ad1889_playback_prepare, 551 .trigger = snd_ad1889_playback_trigger, 552 .pointer = snd_ad1889_playback_pointer, 553}; 554 555static const struct snd_pcm_ops snd_ad1889_capture_ops = { 556 .open = snd_ad1889_capture_open, 557 .close = snd_ad1889_capture_close, 558 .prepare = snd_ad1889_capture_prepare, 559 .trigger = snd_ad1889_capture_trigger, 560 .pointer = snd_ad1889_capture_pointer, 561}; 562 563static irqreturn_t 564snd_ad1889_interrupt(int irq, void *dev_id) 565{ 566 unsigned long st; 567 struct snd_ad1889 *chip = dev_id; 568 569 st = ad1889_readl(chip, AD_DMA_DISR); 570 571 /* clear ISR */ 572 ad1889_writel(chip, AD_DMA_DISR, st); 573 574 st &= AD_INTR_MASK; 575 576 if (unlikely(!st)) 577 return IRQ_NONE; 578 579 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) 580 dev_dbg(chip->card->dev, 581 "Unexpected master or target abort interrupt!\n"); 582 583 if ((st & AD_DMA_DISR_WAVI) && chip->psubs) 584 snd_pcm_period_elapsed(chip->psubs); 585 if ((st & AD_DMA_DISR_ADCI) && chip->csubs) 586 snd_pcm_period_elapsed(chip->csubs); 587 588 return IRQ_HANDLED; 589} 590 591static int 592snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device) 593{ 594 int err; 595 struct snd_pcm *pcm; 596 597 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); 598 if (err < 0) 599 return err; 600 601 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 602 &snd_ad1889_playback_ops); 603 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 604 &snd_ad1889_capture_ops); 605 606 pcm->private_data = chip; 607 pcm->info_flags = 0; 608 strcpy(pcm->name, chip->card->shortname); 609 610 chip->pcm = pcm; 611 chip->psubs = NULL; 612 chip->csubs = NULL; 613 614 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev, 615 BUFFER_BYTES_MAX / 2, BUFFER_BYTES_MAX); 616 617 return 0; 618} 619 620static void 621snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 622{ 623 struct snd_ad1889 *chip = entry->private_data; 624 u16 reg; 625 int tmp; 626 627 reg = ad1889_readw(chip, AD_DS_WSMC); 628 snd_iprintf(buffer, "Wave output: %s\n", 629 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled"); 630 snd_iprintf(buffer, "Wave Channels: %s\n", 631 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 632 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", 633 (reg & AD_DS_WSMC_WA16) ? 16 : 8); 634 635 /* WARQ is at offset 12 */ 636 tmp = (reg & AD_DS_WSMC_WARQ) ? 637 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4; 638 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 639 640 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, 641 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 642 643 644 snd_iprintf(buffer, "Synthesis output: %s\n", 645 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled"); 646 647 /* SYRQ is at offset 4 */ 648 tmp = (reg & AD_DS_WSMC_SYRQ) ? 649 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4; 650 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 651 652 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, 653 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 654 655 reg = ad1889_readw(chip, AD_DS_RAMC); 656 snd_iprintf(buffer, "ADC input: %s\n", 657 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled"); 658 snd_iprintf(buffer, "ADC Channels: %s\n", 659 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 660 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", 661 (reg & AD_DS_RAMC_AD16) ? 16 : 8); 662 663 /* ACRQ is at offset 4 */ 664 tmp = (reg & AD_DS_RAMC_ACRQ) ? 665 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4; 666 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 667 668 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, 669 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 670 671 snd_iprintf(buffer, "Resampler input: %s\n", 672 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled"); 673 674 /* RERQ is at offset 12 */ 675 tmp = (reg & AD_DS_RAMC_RERQ) ? 676 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4; 677 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 678 679 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, 680 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 681 682 683 /* doc says LSB represents -1.5dB, but the max value (-94.5dB) 684 suggests that LSB is -3dB, which is more coherent with the logarithmic 685 nature of the dB scale */ 686 reg = ad1889_readw(chip, AD_DS_WADA); 687 snd_iprintf(buffer, "Left: %s, -%d dB\n", 688 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", 689 ((reg & AD_DS_WADA_LWAA) >> 8) * 3); 690 reg = ad1889_readw(chip, AD_DS_WADA); 691 snd_iprintf(buffer, "Right: %s, -%d dB\n", 692 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", 693 (reg & AD_DS_WADA_RWAA) * 3); 694 695 reg = ad1889_readw(chip, AD_DS_WAS); 696 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); 697 reg = ad1889_readw(chip, AD_DS_RES); 698 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); 699} 700 701static void 702snd_ad1889_proc_init(struct snd_ad1889 *chip) 703{ 704 snd_card_ro_proc_new(chip->card, chip->card->driver, 705 chip, snd_ad1889_proc_read); 706} 707 708static const struct ac97_quirk ac97_quirks[] = { 709 { 710 .subvendor = 0x11d4, /* AD */ 711 .subdevice = 0x1889, /* AD1889 */ 712 .codec_id = AC97_ID_AD1819, 713 .name = "AD1889", 714 .type = AC97_TUNE_HP_ONLY 715 }, 716 { } /* terminator */ 717}; 718 719static void 720snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) 721{ 722 u16 reg; 723 724 reg = ad1889_readw(chip, AD_AC97_ACIC); 725 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ 726 ad1889_writew(chip, AD_AC97_ACIC, reg); 727 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 728 udelay(10); 729 /* Interface Enable */ 730 reg |= AD_AC97_ACIC_ACIE; 731 ad1889_writew(chip, AD_AC97_ACIC, reg); 732 733 snd_ad1889_ac97_ready(chip); 734 735 /* Audio Stream Output | Variable Sample Rate Mode */ 736 reg = ad1889_readw(chip, AD_AC97_ACIC); 737 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; 738 ad1889_writew(chip, AD_AC97_ACIC, reg); 739 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 740 741} 742 743static int 744snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) 745{ 746 int err; 747 struct snd_ac97_template ac97; 748 static const struct snd_ac97_bus_ops ops = { 749 .write = snd_ad1889_ac97_write, 750 .read = snd_ad1889_ac97_read, 751 }; 752 753 /* doing that here, it works. */ 754 snd_ad1889_ac97_xinit(chip); 755 756 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); 757 if (err < 0) 758 return err; 759 760 memset(&ac97, 0, sizeof(ac97)); 761 ac97.private_data = chip; 762 ac97.pci = chip->pci; 763 764 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); 765 if (err < 0) 766 return err; 767 768 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); 769 770 return 0; 771} 772 773static void 774snd_ad1889_free(struct snd_card *card) 775{ 776 struct snd_ad1889 *chip = card->private_data; 777 778 spin_lock_irq(&chip->lock); 779 780 ad1889_mute(chip); 781 782 /* Turn off interrupt on count and zero DMA registers */ 783 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); 784 785 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ 786 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); 787 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ 788 789 spin_unlock_irq(&chip->lock); 790} 791 792static int 793snd_ad1889_create(struct snd_card *card, struct pci_dev *pci) 794{ 795 struct snd_ad1889 *chip = card->private_data; 796 int err; 797 798 err = pcim_enable_device(pci); 799 if (err < 0) 800 return err; 801 802 /* check PCI availability (32bit DMA) */ 803 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) { 804 dev_err(card->dev, "error setting 32-bit DMA mask.\n"); 805 return -ENXIO; 806 } 807 808 chip->card = card; 809 chip->pci = pci; 810 chip->irq = -1; 811 812 /* (1) PCI resource allocation */ 813 err = pcim_iomap_regions(pci, 1 << 0, card->driver); 814 if (err < 0) 815 return err; 816 817 chip->bar = pci_resource_start(pci, 0); 818 chip->iobase = pcim_iomap_table(pci)[0]; 819 820 pci_set_master(pci); 821 822 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ 823 824 if (devm_request_irq(&pci->dev, pci->irq, snd_ad1889_interrupt, 825 IRQF_SHARED, KBUILD_MODNAME, chip)) { 826 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq); 827 return -EBUSY; 828 } 829 830 chip->irq = pci->irq; 831 card->sync_irq = chip->irq; 832 card->private_free = snd_ad1889_free; 833 834 /* (2) initialization of the chip hardware */ 835 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ 836 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ 837 838 usleep_range(10000, 11000); 839 840 /* enable Master and Target abort interrupts */ 841 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); 842 843 return 0; 844} 845 846static int 847__snd_ad1889_probe(struct pci_dev *pci, 848 const struct pci_device_id *pci_id) 849{ 850 int err; 851 static int devno; 852 struct snd_card *card; 853 struct snd_ad1889 *chip; 854 855 /* (1) */ 856 if (devno >= SNDRV_CARDS) 857 return -ENODEV; 858 if (!enable[devno]) { 859 devno++; 860 return -ENOENT; 861 } 862 863 /* (2) */ 864 err = snd_devm_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE, 865 sizeof(*chip), &card); 866 if (err < 0) 867 return err; 868 chip = card->private_data; 869 870 strcpy(card->driver, "AD1889"); 871 strcpy(card->shortname, "Analog Devices AD1889"); 872 873 /* (3) */ 874 err = snd_ad1889_create(card, pci); 875 if (err < 0) 876 return err; 877 878 /* (4) */ 879 sprintf(card->longname, "%s at 0x%lx irq %i", 880 card->shortname, chip->bar, chip->irq); 881 882 /* (5) */ 883 /* register AC97 mixer */ 884 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); 885 if (err < 0) 886 return err; 887 888 err = snd_ad1889_pcm_init(chip, 0); 889 if (err < 0) 890 return err; 891 892 /* register proc interface */ 893 snd_ad1889_proc_init(chip); 894 895 /* (6) */ 896 err = snd_card_register(card); 897 if (err < 0) 898 return err; 899 900 /* (7) */ 901 pci_set_drvdata(pci, card); 902 903 devno++; 904 return 0; 905} 906 907static int snd_ad1889_probe(struct pci_dev *pci, 908 const struct pci_device_id *pci_id) 909{ 910 return snd_card_free_on_error(&pci->dev, __snd_ad1889_probe(pci, pci_id)); 911} 912 913static const struct pci_device_id snd_ad1889_ids[] = { 914 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, 915 { 0, }, 916}; 917MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); 918 919static struct pci_driver ad1889_pci_driver = { 920 .name = KBUILD_MODNAME, 921 .id_table = snd_ad1889_ids, 922 .probe = snd_ad1889_probe, 923}; 924 925module_pci_driver(ad1889_pci_driver); 926