162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0 OR MIT) 262306a36Sopenharmony_ci/* Copyright (c) 2022 Microchip Technology Inc */ 362306a36Sopenharmony_ci 462306a36Sopenharmony_ci/dts-v1/; 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#include "mpfs.dtsi" 762306a36Sopenharmony_ci#include "mpfs-sev-kit-fabric.dtsi" 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci/* Clock frequency (in Hz) of the rtcclk */ 1062306a36Sopenharmony_ci#define MTIMER_FREQ 1000000 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci/ { 1362306a36Sopenharmony_ci #address-cells = <2>; 1462306a36Sopenharmony_ci #size-cells = <2>; 1562306a36Sopenharmony_ci model = "Microchip PolarFire-SoC SEV Kit"; 1662306a36Sopenharmony_ci compatible = "microchip,mpfs-sev-kit", "microchip,mpfs"; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci aliases { 1962306a36Sopenharmony_ci ethernet0 = &mac1; 2062306a36Sopenharmony_ci serial0 = &mmuart0; 2162306a36Sopenharmony_ci serial1 = &mmuart1; 2262306a36Sopenharmony_ci serial2 = &mmuart2; 2362306a36Sopenharmony_ci serial3 = &mmuart3; 2462306a36Sopenharmony_ci serial4 = &mmuart4; 2562306a36Sopenharmony_ci }; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci chosen { 2862306a36Sopenharmony_ci stdout-path = "serial1:115200n8"; 2962306a36Sopenharmony_ci }; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci cpus { 3262306a36Sopenharmony_ci timebase-frequency = <MTIMER_FREQ>; 3362306a36Sopenharmony_ci }; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci reserved-memory { 3662306a36Sopenharmony_ci #address-cells = <2>; 3762306a36Sopenharmony_ci #size-cells = <2>; 3862306a36Sopenharmony_ci ranges; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci fabricbuf0ddrc: buffer@80000000 { 4162306a36Sopenharmony_ci compatible = "shared-dma-pool"; 4262306a36Sopenharmony_ci reg = <0x0 0x80000000 0x0 0x2000000>; 4362306a36Sopenharmony_ci }; 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci fabricbuf1ddrnc: buffer@c4000000 { 4662306a36Sopenharmony_ci compatible = "shared-dma-pool"; 4762306a36Sopenharmony_ci reg = <0x0 0xc4000000 0x0 0x4000000>; 4862306a36Sopenharmony_ci }; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci fabricbuf2ddrncwcb: buffer@d4000000 { 5162306a36Sopenharmony_ci compatible = "shared-dma-pool"; 5262306a36Sopenharmony_ci reg = <0x0 0xd4000000 0x0 0x4000000>; 5362306a36Sopenharmony_ci }; 5462306a36Sopenharmony_ci }; 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci ddrc_cache: memory@1000000000 { 5762306a36Sopenharmony_ci device_type = "memory"; 5862306a36Sopenharmony_ci reg = <0x10 0x0 0x0 0x76000000>; 5962306a36Sopenharmony_ci }; 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci&i2c0 { 6362306a36Sopenharmony_ci status = "okay"; 6462306a36Sopenharmony_ci}; 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci&gpio2 { 6762306a36Sopenharmony_ci interrupts = <53>, <53>, <53>, <53>, 6862306a36Sopenharmony_ci <53>, <53>, <53>, <53>, 6962306a36Sopenharmony_ci <53>, <53>, <53>, <53>, 7062306a36Sopenharmony_ci <53>, <53>, <53>, <53>, 7162306a36Sopenharmony_ci <53>, <53>, <53>, <53>, 7262306a36Sopenharmony_ci <53>, <53>, <53>, <53>, 7362306a36Sopenharmony_ci <53>, <53>, <53>, <53>, 7462306a36Sopenharmony_ci <53>, <53>, <53>, <53>; 7562306a36Sopenharmony_ci status = "okay"; 7662306a36Sopenharmony_ci}; 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci&mac0 { 7962306a36Sopenharmony_ci status = "okay"; 8062306a36Sopenharmony_ci phy-mode = "sgmii"; 8162306a36Sopenharmony_ci phy-handle = <&phy0>; 8262306a36Sopenharmony_ci phy1: ethernet-phy@9 { 8362306a36Sopenharmony_ci reg = <9>; 8462306a36Sopenharmony_ci }; 8562306a36Sopenharmony_ci phy0: ethernet-phy@8 { 8662306a36Sopenharmony_ci reg = <8>; 8762306a36Sopenharmony_ci }; 8862306a36Sopenharmony_ci}; 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci&mac1 { 9162306a36Sopenharmony_ci status = "okay"; 9262306a36Sopenharmony_ci phy-mode = "sgmii"; 9362306a36Sopenharmony_ci phy-handle = <&phy1>; 9462306a36Sopenharmony_ci}; 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci&mbox { 9762306a36Sopenharmony_ci status = "okay"; 9862306a36Sopenharmony_ci}; 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci&mmc { 10162306a36Sopenharmony_ci status = "okay"; 10262306a36Sopenharmony_ci bus-width = <4>; 10362306a36Sopenharmony_ci disable-wp; 10462306a36Sopenharmony_ci cap-sd-highspeed; 10562306a36Sopenharmony_ci cap-mmc-highspeed; 10662306a36Sopenharmony_ci mmc-ddr-1_8v; 10762306a36Sopenharmony_ci mmc-hs200-1_8v; 10862306a36Sopenharmony_ci sd-uhs-sdr12; 10962306a36Sopenharmony_ci sd-uhs-sdr25; 11062306a36Sopenharmony_ci sd-uhs-sdr50; 11162306a36Sopenharmony_ci sd-uhs-sdr104; 11262306a36Sopenharmony_ci}; 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_ci&mmuart1 { 11562306a36Sopenharmony_ci status = "okay"; 11662306a36Sopenharmony_ci}; 11762306a36Sopenharmony_ci 11862306a36Sopenharmony_ci&mmuart2 { 11962306a36Sopenharmony_ci status = "okay"; 12062306a36Sopenharmony_ci}; 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci&mmuart3 { 12362306a36Sopenharmony_ci status = "okay"; 12462306a36Sopenharmony_ci}; 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci&mmuart4 { 12762306a36Sopenharmony_ci status = "okay"; 12862306a36Sopenharmony_ci}; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci&refclk { 13162306a36Sopenharmony_ci clock-frequency = <125000000>; 13262306a36Sopenharmony_ci}; 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_ci&rtc { 13562306a36Sopenharmony_ci status = "okay"; 13662306a36Sopenharmony_ci}; 13762306a36Sopenharmony_ci 13862306a36Sopenharmony_ci&syscontroller { 13962306a36Sopenharmony_ci status = "okay"; 14062306a36Sopenharmony_ci}; 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ci&usb { 14362306a36Sopenharmony_ci status = "okay"; 14462306a36Sopenharmony_ci dr_mode = "otg"; 14562306a36Sopenharmony_ci}; 146