162306a36Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Devicetree bindings definitions for tlv320adc3xxx driver. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2021 Axis Communications AB 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci#ifndef __DT_TLV320ADC3XXX_H 862306a36Sopenharmony_ci#define __DT_TLV320ADC3XXX_H 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#define ADC3XXX_GPIO_DISABLED 0 /* I/O buffers powered down */ 1162306a36Sopenharmony_ci#define ADC3XXX_GPIO_INPUT 1 /* Various non-GPIO inputs */ 1262306a36Sopenharmony_ci#define ADC3XXX_GPIO_GPI 2 /* General purpose input */ 1362306a36Sopenharmony_ci#define ADC3XXX_GPIO_GPO 3 /* General purpose output */ 1462306a36Sopenharmony_ci#define ADC3XXX_GPIO_CLKOUT 4 /* Source set in reg. CLKOUT_MUX */ 1562306a36Sopenharmony_ci#define ADC3XXX_GPIO_INT1 5 /* INT1 output */ 1662306a36Sopenharmony_ci#define ADC3XXX_GPIO_INT2 6 /* INT2 output */ 1762306a36Sopenharmony_ci/* value 7 is reserved */ 1862306a36Sopenharmony_ci#define ADC3XXX_GPIO_SECONDARY_BCLK 8 /* Codec interface secondary BCLK */ 1962306a36Sopenharmony_ci#define ADC3XXX_GPIO_SECONDARY_WCLK 9 /* Codec interface secondary WCLK */ 2062306a36Sopenharmony_ci#define ADC3XXX_GPIO_ADC_MOD_CLK 10 /* Clock output for digital mics */ 2162306a36Sopenharmony_ci/* values 11-15 reserved */ 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci#define ADC3XXX_MICBIAS_OFF 0 /* Micbias pin powered off */ 2462306a36Sopenharmony_ci#define ADC3XXX_MICBIAS_2_0V 1 /* Micbias pin set to 2.0V */ 2562306a36Sopenharmony_ci#define ADC3XXX_MICBIAS_2_5V 2 /* Micbias pin set to 2.5V */ 2662306a36Sopenharmony_ci#define ADC3XXX_MICBIAS_AVDD 3 /* Use AVDD voltage for micbias pin */ 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci#endif /* __DT_TLV320ADC3XXX_H */ 29