162306a36Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci *
362306a36Sopenharmony_ci * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
462306a36Sopenharmony_ci * Author: Xingyu Chen <xingyu.chen@amlogic.com>
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H
962306a36Sopenharmony_ci#define _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/*	RESET0					*/
1262306a36Sopenharmony_ci/*					0	*/
1362306a36Sopenharmony_ci#define RESET_AM2AXI_VAD		1
1462306a36Sopenharmony_ci/*					2-3	*/
1562306a36Sopenharmony_ci#define RESET_PSRAM			4
1662306a36Sopenharmony_ci#define RESET_PAD_CTRL			5
1762306a36Sopenharmony_ci/*					6	*/
1862306a36Sopenharmony_ci#define RESET_TEMP_SENSOR		7
1962306a36Sopenharmony_ci#define RESET_AM2AXI_DEV		8
2062306a36Sopenharmony_ci/*					9	*/
2162306a36Sopenharmony_ci#define RESET_SPICC_A			10
2262306a36Sopenharmony_ci#define RESET_MSR_CLK			11
2362306a36Sopenharmony_ci#define RESET_AUDIO			12
2462306a36Sopenharmony_ci#define RESET_ANALOG_CTRL		13
2562306a36Sopenharmony_ci#define RESET_SAR_ADC			14
2662306a36Sopenharmony_ci#define RESET_AUDIO_VAD			15
2762306a36Sopenharmony_ci#define RESET_CEC			16
2862306a36Sopenharmony_ci#define RESET_PWM_EF			17
2962306a36Sopenharmony_ci#define RESET_PWM_CD			18
3062306a36Sopenharmony_ci#define RESET_PWM_AB			19
3162306a36Sopenharmony_ci/*					20	*/
3262306a36Sopenharmony_ci#define RESET_IR_CTRL			21
3362306a36Sopenharmony_ci#define RESET_I2C_S_A			22
3462306a36Sopenharmony_ci/*					23	*/
3562306a36Sopenharmony_ci#define RESET_I2C_M_D			24
3662306a36Sopenharmony_ci#define RESET_I2C_M_C			25
3762306a36Sopenharmony_ci#define RESET_I2C_M_B			26
3862306a36Sopenharmony_ci#define RESET_I2C_M_A			27
3962306a36Sopenharmony_ci#define RESET_I2C_PROD_AHB		28
4062306a36Sopenharmony_ci#define RESET_I2C_PROD			29
4162306a36Sopenharmony_ci/*					30-31	*/
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci/*	RESET1					*/
4462306a36Sopenharmony_ci#define RESET_ACODEC			32
4562306a36Sopenharmony_ci#define RESET_DMA			33
4662306a36Sopenharmony_ci#define RESET_SD_EMMC_A			34
4762306a36Sopenharmony_ci/*					35	*/
4862306a36Sopenharmony_ci#define RESET_USBCTRL			36
4962306a36Sopenharmony_ci/*					37	*/
5062306a36Sopenharmony_ci#define RESET_USBPHY			38
5162306a36Sopenharmony_ci/*					39-41	*/
5262306a36Sopenharmony_ci#define RESET_RSA			42
5362306a36Sopenharmony_ci#define RESET_DMC			43
5462306a36Sopenharmony_ci/*					44	*/
5562306a36Sopenharmony_ci#define RESET_IRQ_CTRL			45
5662306a36Sopenharmony_ci/*					46	*/
5762306a36Sopenharmony_ci#define RESET_NIC_VAD			47
5862306a36Sopenharmony_ci#define RESET_NIC_AXI			48
5962306a36Sopenharmony_ci#define RESET_RAMA			49
6062306a36Sopenharmony_ci#define RESET_RAMB			50
6162306a36Sopenharmony_ci/*					51-52	*/
6262306a36Sopenharmony_ci#define RESET_ROM			53
6362306a36Sopenharmony_ci#define RESET_SPIFC			54
6462306a36Sopenharmony_ci#define RESET_GIC			55
6562306a36Sopenharmony_ci#define RESET_UART_C			56
6662306a36Sopenharmony_ci#define RESET_UART_B			57
6762306a36Sopenharmony_ci#define RESET_UART_A			58
6862306a36Sopenharmony_ci#define RESET_OSC_RING			59
6962306a36Sopenharmony_ci/*					60-63	*/
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci/*	RESET2					*/
7262306a36Sopenharmony_ci/*					64-95	*/
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci#endif
75