162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * This header provides constants for OMAP pinctrl bindings. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2009 Nokia 662306a36Sopenharmony_ci * Copyright (C) 2009-2010 Texas Instruments 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#ifndef _DT_BINDINGS_PINCTRL_OMAP_H 1062306a36Sopenharmony_ci#define _DT_BINDINGS_PINCTRL_OMAP_H 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci/* 34xx mux mode options for each pin. See TRM for options */ 1362306a36Sopenharmony_ci#define MUX_MODE0 0 1462306a36Sopenharmony_ci#define MUX_MODE1 1 1562306a36Sopenharmony_ci#define MUX_MODE2 2 1662306a36Sopenharmony_ci#define MUX_MODE3 3 1762306a36Sopenharmony_ci#define MUX_MODE4 4 1862306a36Sopenharmony_ci#define MUX_MODE5 5 1962306a36Sopenharmony_ci#define MUX_MODE6 6 2062306a36Sopenharmony_ci#define MUX_MODE7 7 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci/* 24xx/34xx mux bit defines */ 2362306a36Sopenharmony_ci#define PULL_ENA (1 << 3) 2462306a36Sopenharmony_ci#define PULL_UP (1 << 4) 2562306a36Sopenharmony_ci#define ALTELECTRICALSEL (1 << 5) 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci/* omap3/4/5 specific mux bit defines */ 2862306a36Sopenharmony_ci#define INPUT_EN (1 << 8) 2962306a36Sopenharmony_ci#define OFF_EN (1 << 9) 3062306a36Sopenharmony_ci#define OFFOUT_EN (1 << 10) 3162306a36Sopenharmony_ci#define OFFOUT_VAL (1 << 11) 3262306a36Sopenharmony_ci#define OFF_PULL_EN (1 << 12) 3362306a36Sopenharmony_ci#define OFF_PULL_UP (1 << 13) 3462306a36Sopenharmony_ci#define WAKEUP_EN (1 << 14) 3562306a36Sopenharmony_ci#define WAKEUP_EVENT (1 << 15) 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci/* Active pin states */ 3862306a36Sopenharmony_ci#define PIN_OUTPUT 0 3962306a36Sopenharmony_ci#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) 4062306a36Sopenharmony_ci#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) 4162306a36Sopenharmony_ci#define PIN_INPUT INPUT_EN 4262306a36Sopenharmony_ci#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) 4362306a36Sopenharmony_ci#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci/* Off mode states */ 4662306a36Sopenharmony_ci#define PIN_OFF_NONE 0 4762306a36Sopenharmony_ci#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL) 4862306a36Sopenharmony_ci#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN) 4962306a36Sopenharmony_ci#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP) 5062306a36Sopenharmony_ci#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN) 5162306a36Sopenharmony_ci#define PIN_OFF_WAKEUPENABLE WAKEUP_EN 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci/* 5462306a36Sopenharmony_ci * Macros to allow using the absolute physical address instead of the 5562306a36Sopenharmony_ci * padconf registers instead of the offset from padconf base. 5662306a36Sopenharmony_ci */ 5762306a36Sopenharmony_ci#define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset)) 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ci#define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val) 6062306a36Sopenharmony_ci#define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) 6162306a36Sopenharmony_ci#define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) 6262306a36Sopenharmony_ci#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val) 6362306a36Sopenharmony_ci#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) 6462306a36Sopenharmony_ci#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) 6562306a36Sopenharmony_ci#define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) 6662306a36Sopenharmony_ci#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) 6762306a36Sopenharmony_ci#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) (0) 6862306a36Sopenharmony_ci#define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux) 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci/* 7162306a36Sopenharmony_ci * Macros to allow using the offset from the padconf physical address 7262306a36Sopenharmony_ci * instead of the offset from padconf base. 7362306a36Sopenharmony_ci */ 7462306a36Sopenharmony_ci#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset)) 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 7762306a36Sopenharmony_ci#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci/* 8062306a36Sopenharmony_ci * Define some commonly used pins configured by the boards. 8162306a36Sopenharmony_ci * Note that some boards use alternative pins, so check 8262306a36Sopenharmony_ci * the schematics before using these. 8362306a36Sopenharmony_ci */ 8462306a36Sopenharmony_ci#define OMAP3_UART1_RX 0x152 8562306a36Sopenharmony_ci#define OMAP3_UART2_RX 0x14a 8662306a36Sopenharmony_ci#define OMAP3_UART3_RX 0x16e 8762306a36Sopenharmony_ci#define OMAP4_UART2_RX 0xdc 8862306a36Sopenharmony_ci#define OMAP4_UART3_RX 0x104 8962306a36Sopenharmony_ci#define OMAP4_UART4_RX 0x11c 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci#endif 9262306a36Sopenharmony_ci 93