162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * This header provides constants for DRA pinctrl bindings.
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
662306a36Sopenharmony_ci * Author: Rajendra Nayak <rnayak@ti.com>
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#ifndef _DT_BINDINGS_PINCTRL_DRA_H
1062306a36Sopenharmony_ci#define _DT_BINDINGS_PINCTRL_DRA_H
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci/* DRA7 mux mode options for each pin. See TRM for options */
1362306a36Sopenharmony_ci#define MUX_MODE0	0x0
1462306a36Sopenharmony_ci#define MUX_MODE1	0x1
1562306a36Sopenharmony_ci#define MUX_MODE2	0x2
1662306a36Sopenharmony_ci#define MUX_MODE3	0x3
1762306a36Sopenharmony_ci#define MUX_MODE4	0x4
1862306a36Sopenharmony_ci#define MUX_MODE5	0x5
1962306a36Sopenharmony_ci#define MUX_MODE6	0x6
2062306a36Sopenharmony_ci#define MUX_MODE7	0x7
2162306a36Sopenharmony_ci#define MUX_MODE8	0x8
2262306a36Sopenharmony_ci#define MUX_MODE9	0x9
2362306a36Sopenharmony_ci#define MUX_MODE10	0xa
2462306a36Sopenharmony_ci#define MUX_MODE11	0xb
2562306a36Sopenharmony_ci#define MUX_MODE12	0xc
2662306a36Sopenharmony_ci#define MUX_MODE13	0xd
2762306a36Sopenharmony_ci#define MUX_MODE14	0xe
2862306a36Sopenharmony_ci#define MUX_MODE15	0xf
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci/* Certain pins need virtual mode, but note: they may glitch */
3162306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE0	(MODE_SELECT | (0x0 << 4))
3262306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE1	(MODE_SELECT | (0x1 << 4))
3362306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE2	(MODE_SELECT | (0x2 << 4))
3462306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE3	(MODE_SELECT | (0x3 << 4))
3562306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE4	(MODE_SELECT | (0x4 << 4))
3662306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE5	(MODE_SELECT | (0x5 << 4))
3762306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE6	(MODE_SELECT | (0x6 << 4))
3862306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE7	(MODE_SELECT | (0x7 << 4))
3962306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE8	(MODE_SELECT | (0x8 << 4))
4062306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE9	(MODE_SELECT | (0x9 << 4))
4162306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE10	(MODE_SELECT | (0xa << 4))
4262306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE11	(MODE_SELECT | (0xb << 4))
4362306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE12	(MODE_SELECT | (0xc << 4))
4462306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE13	(MODE_SELECT | (0xd << 4))
4562306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE14	(MODE_SELECT | (0xe << 4))
4662306a36Sopenharmony_ci#define MUX_VIRTUAL_MODE15	(MODE_SELECT | (0xf << 4))
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci#define MODE_SELECT		(1 << 8)
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci#define PULL_ENA		(0 << 16)
5162306a36Sopenharmony_ci#define PULL_DIS		(1 << 16)
5262306a36Sopenharmony_ci#define PULL_UP			(1 << 17)
5362306a36Sopenharmony_ci#define INPUT_EN		(1 << 18)
5462306a36Sopenharmony_ci#define SLEWCONTROL		(1 << 19)
5562306a36Sopenharmony_ci#define WAKEUP_EN		(1 << 24)
5662306a36Sopenharmony_ci#define WAKEUP_EVENT		(1 << 25)
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ci/* Active pin states */
5962306a36Sopenharmony_ci#define PIN_OUTPUT		(0 | PULL_DIS)
6062306a36Sopenharmony_ci#define PIN_OUTPUT_PULLUP	(PULL_UP)
6162306a36Sopenharmony_ci#define PIN_OUTPUT_PULLDOWN	(0)
6262306a36Sopenharmony_ci#define PIN_INPUT		(INPUT_EN | PULL_DIS)
6362306a36Sopenharmony_ci#define PIN_INPUT_SLEW		(INPUT_EN | SLEWCONTROL)
6462306a36Sopenharmony_ci#define PIN_INPUT_PULLUP	(PULL_ENA | INPUT_EN | PULL_UP)
6562306a36Sopenharmony_ci#define PIN_INPUT_PULLDOWN	(PULL_ENA | INPUT_EN)
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci/*
6862306a36Sopenharmony_ci * Macro to allow using the absolute physical address instead of the
6962306a36Sopenharmony_ci * padconf registers instead of the offset from padconf base.
7062306a36Sopenharmony_ci */
7162306a36Sopenharmony_ci#define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci/* DRA7 IODELAY configuration parameters */
7462306a36Sopenharmony_ci#define A_DELAY_PS(val)			((val) & 0xffff)
7562306a36Sopenharmony_ci#define G_DELAY_PS(val)			((val) & 0xffff)
7662306a36Sopenharmony_ci#endif
7762306a36Sopenharmony_ci
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