162306a36Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2021, The Linux Foundation. All rights reserved.
462306a36Sopenharmony_ci * Copyright (c) 2022, Linaro Limited
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H
862306a36Sopenharmony_ci#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci/* Clocks */
1162306a36Sopenharmony_ci#define DISP_CC_PLL0					0
1262306a36Sopenharmony_ci#define DISP_CC_MDSS_AHB_CLK				1
1362306a36Sopenharmony_ci#define DISP_CC_MDSS_AHB_CLK_SRC			2
1462306a36Sopenharmony_ci#define DISP_CC_MDSS_BYTE0_CLK				3
1562306a36Sopenharmony_ci#define DISP_CC_MDSS_BYTE0_CLK_SRC			4
1662306a36Sopenharmony_ci#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC			5
1762306a36Sopenharmony_ci#define DISP_CC_MDSS_BYTE0_INTF_CLK			6
1862306a36Sopenharmony_ci#define DISP_CC_MDSS_ESC0_CLK				7
1962306a36Sopenharmony_ci#define DISP_CC_MDSS_ESC0_CLK_SRC			8
2062306a36Sopenharmony_ci#define DISP_CC_MDSS_MDP_CLK				9
2162306a36Sopenharmony_ci#define DISP_CC_MDSS_MDP_CLK_SRC			10
2262306a36Sopenharmony_ci#define DISP_CC_MDSS_MDP_LUT_CLK			11
2362306a36Sopenharmony_ci#define DISP_CC_MDSS_NON_GDSC_AHB_CLK			12
2462306a36Sopenharmony_ci#define DISP_CC_MDSS_PCLK0_CLK				13
2562306a36Sopenharmony_ci#define DISP_CC_MDSS_PCLK0_CLK_SRC			14
2662306a36Sopenharmony_ci#define DISP_CC_MDSS_ROT_CLK				15
2762306a36Sopenharmony_ci#define DISP_CC_MDSS_ROT_CLK_SRC			16
2862306a36Sopenharmony_ci#define DISP_CC_MDSS_RSCC_AHB_CLK			17
2962306a36Sopenharmony_ci#define DISP_CC_MDSS_RSCC_VSYNC_CLK			18
3062306a36Sopenharmony_ci#define DISP_CC_MDSS_VSYNC_CLK				19
3162306a36Sopenharmony_ci#define DISP_CC_MDSS_VSYNC_CLK_SRC			20
3262306a36Sopenharmony_ci#define DISP_CC_SLEEP_CLK				21
3362306a36Sopenharmony_ci#define DISP_CC_XO_CLK					22
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci/* Resets */
3662306a36Sopenharmony_ci#define DISP_CC_MDSS_CORE_BCR				0
3762306a36Sopenharmony_ci#define DISP_CC_MDSS_RSCC_BCR				1
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci/* GDSCs */
4062306a36Sopenharmony_ci#define MDSS_GDSC					0
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci#endif
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