162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * This header provides clock numbers for the ingenic,x1000-cgu DT binding.
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * They are roughly ordered as:
662306a36Sopenharmony_ci *   - external clocks
762306a36Sopenharmony_ci *   - PLLs
862306a36Sopenharmony_ci *   - muxes/dividers in the order they appear in the x1000 programmers manual
962306a36Sopenharmony_ci *   - gates in order of their bit in the CLKGR* registers
1062306a36Sopenharmony_ci */
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci#ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__
1362306a36Sopenharmony_ci#define __DT_BINDINGS_CLOCK_X1000_CGU_H__
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#define X1000_CLK_EXCLK			0
1662306a36Sopenharmony_ci#define X1000_CLK_RTCLK			1
1762306a36Sopenharmony_ci#define X1000_CLK_APLL			2
1862306a36Sopenharmony_ci#define X1000_CLK_MPLL			3
1962306a36Sopenharmony_ci#define X1000_CLK_OTGPHY		4
2062306a36Sopenharmony_ci#define X1000_CLK_SCLKA			5
2162306a36Sopenharmony_ci#define X1000_CLK_CPUMUX		6
2262306a36Sopenharmony_ci#define X1000_CLK_CPU			7
2362306a36Sopenharmony_ci#define X1000_CLK_L2CACHE		8
2462306a36Sopenharmony_ci#define X1000_CLK_AHB0			9
2562306a36Sopenharmony_ci#define X1000_CLK_AHB2PMUX		10
2662306a36Sopenharmony_ci#define X1000_CLK_AHB2			11
2762306a36Sopenharmony_ci#define X1000_CLK_PCLK			12
2862306a36Sopenharmony_ci#define X1000_CLK_DDR			13
2962306a36Sopenharmony_ci#define X1000_CLK_MAC			14
3062306a36Sopenharmony_ci#define X1000_CLK_LCD			15
3162306a36Sopenharmony_ci#define X1000_CLK_MSCMUX		16
3262306a36Sopenharmony_ci#define X1000_CLK_MSC0			17
3362306a36Sopenharmony_ci#define X1000_CLK_MSC1			18
3462306a36Sopenharmony_ci#define X1000_CLK_OTG			19
3562306a36Sopenharmony_ci#define X1000_CLK_SSIPLL		20
3662306a36Sopenharmony_ci#define X1000_CLK_SSIPLL_DIV2	21
3762306a36Sopenharmony_ci#define X1000_CLK_SSIMUX		22
3862306a36Sopenharmony_ci#define X1000_CLK_EMC			23
3962306a36Sopenharmony_ci#define X1000_CLK_EFUSE			24
4062306a36Sopenharmony_ci#define X1000_CLK_SFC			25
4162306a36Sopenharmony_ci#define X1000_CLK_I2C0			26
4262306a36Sopenharmony_ci#define X1000_CLK_I2C1			27
4362306a36Sopenharmony_ci#define X1000_CLK_I2C2			28
4462306a36Sopenharmony_ci#define X1000_CLK_UART0			29
4562306a36Sopenharmony_ci#define X1000_CLK_UART1			30
4662306a36Sopenharmony_ci#define X1000_CLK_UART2			31
4762306a36Sopenharmony_ci#define X1000_CLK_TCU			32
4862306a36Sopenharmony_ci#define X1000_CLK_SSI			33
4962306a36Sopenharmony_ci#define X1000_CLK_OST			34
5062306a36Sopenharmony_ci#define X1000_CLK_PDMA			35
5162306a36Sopenharmony_ci#define X1000_CLK_EXCLK_DIV512	36
5262306a36Sopenharmony_ci#define X1000_CLK_RTC			37
5362306a36Sopenharmony_ci#define X1000_CLK_AIC			38
5462306a36Sopenharmony_ci#define X1000_CLK_I2SPLLMUX		39
5562306a36Sopenharmony_ci#define X1000_CLK_I2SPLL		40
5662306a36Sopenharmony_ci#define X1000_CLK_I2S			41
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ci#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */
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