162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/** 362306a36Sopenharmony_ci * DT Overlay for MAIN CPSW2G using GESI Expansion Board with J7 common processor board. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * GESI Board Product Link: https://www.ti.com/tool/J7EXPCXEVM 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci/dts-v1/; 1162306a36Sopenharmony_ci/plugin/; 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <dt-bindings/gpio/gpio.h> 1462306a36Sopenharmony_ci#include <dt-bindings/net/ti-dp83867.h> 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#include "k3-pinctrl.h" 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci&{/} { 1962306a36Sopenharmony_ci aliases { 2062306a36Sopenharmony_ci ethernet1 = "/bus@100000/ethernet@c200000/ethernet-ports/port@1"; 2162306a36Sopenharmony_ci }; 2262306a36Sopenharmony_ci}; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci&main_pmx0 { 2562306a36Sopenharmony_ci main_cpsw_mdio_default_pins: main-cpsw-mdio-default-pins { 2662306a36Sopenharmony_ci pinctrl-single,pins = < 2762306a36Sopenharmony_ci J721S2_IOPAD(0x0c0, PIN_OUTPUT, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */ 2862306a36Sopenharmony_ci J721S2_IOPAD(0x0bc, PIN_INPUT, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */ 2962306a36Sopenharmony_ci >; 3062306a36Sopenharmony_ci }; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci rgmii1_default_pins: rgmii1-default-pins { 3362306a36Sopenharmony_ci pinctrl-single,pins = < 3462306a36Sopenharmony_ci J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */ 3562306a36Sopenharmony_ci J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */ 3662306a36Sopenharmony_ci J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */ 3762306a36Sopenharmony_ci J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */ 3862306a36Sopenharmony_ci J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */ 3962306a36Sopenharmony_ci J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */ 4062306a36Sopenharmony_ci J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */ 4162306a36Sopenharmony_ci J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */ 4262306a36Sopenharmony_ci J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */ 4362306a36Sopenharmony_ci J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */ 4462306a36Sopenharmony_ci J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */ 4562306a36Sopenharmony_ci J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */ 4662306a36Sopenharmony_ci >; 4762306a36Sopenharmony_ci }; 4862306a36Sopenharmony_ci}; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci&exp1 { 5162306a36Sopenharmony_ci p15 { 5262306a36Sopenharmony_ci /* P15 - EXP_MUX2 */ 5362306a36Sopenharmony_ci gpio-hog; 5462306a36Sopenharmony_ci gpios = <13 GPIO_ACTIVE_HIGH>; 5562306a36Sopenharmony_ci output-high; 5662306a36Sopenharmony_ci line-name = "EXP_MUX2"; 5762306a36Sopenharmony_ci }; 5862306a36Sopenharmony_ci}; 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci&main_cpsw { 6162306a36Sopenharmony_ci status = "okay"; 6262306a36Sopenharmony_ci pinctrl-names = "default"; 6362306a36Sopenharmony_ci pinctrl-0 = <&rgmii1_default_pins>; 6462306a36Sopenharmony_ci}; 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci&main_cpsw_mdio { 6762306a36Sopenharmony_ci status = "okay"; 6862306a36Sopenharmony_ci pinctrl-names = "default"; 6962306a36Sopenharmony_ci pinctrl-0 = <&main_cpsw_mdio_default_pins>; 7062306a36Sopenharmony_ci #address-cells = <1>; 7162306a36Sopenharmony_ci #size-cells = <0>; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci main_cpsw_phy0: ethernet-phy@0 { 7462306a36Sopenharmony_ci reg = <0>; 7562306a36Sopenharmony_ci ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 7662306a36Sopenharmony_ci ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 7762306a36Sopenharmony_ci ti,min-output-impedance; 7862306a36Sopenharmony_ci }; 7962306a36Sopenharmony_ci}; 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci&main_cpsw_port1 { 8262306a36Sopenharmony_ci status = "okay"; 8362306a36Sopenharmony_ci phy-mode = "rgmii-rxid"; 8462306a36Sopenharmony_ci phy-handle = <&main_cpsw_phy0>; 8562306a36Sopenharmony_ci}; 86