162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) Siemens AG, 2018-2023 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Authors: 662306a36Sopenharmony_ci * Chao Zeng <chao.zeng@siemens.com> 762306a36Sopenharmony_ci * Jan Kiszka <jan.kiszka@siemens.com> 862306a36Sopenharmony_ci * 962306a36Sopenharmony_ci * AM6548-based (quad-core) IOT2050 M.2 variant (based on Advanced Product 1062306a36Sopenharmony_ci * Generation 2), 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 1162306a36Sopenharmony_ci * 1262306a36Sopenharmony_ci * Product homepage: 1362306a36Sopenharmony_ci * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 1462306a36Sopenharmony_ci */ 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#include "k3-am6548-iot2050-advanced-common.dtsi" 1762306a36Sopenharmony_ci#include "k3-am65-iot2050-common-pg2.dtsi" 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci/ { 2062306a36Sopenharmony_ci compatible = "siemens,iot2050-advanced-m2", "ti,am654"; 2162306a36Sopenharmony_ci model = "SIMATIC IOT2050 Advanced M2"; 2262306a36Sopenharmony_ci}; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci&mcu_r5fss0 { 2562306a36Sopenharmony_ci /* lock-step mode not supported on this board */ 2662306a36Sopenharmony_ci ti,cluster-mode = <0>; 2762306a36Sopenharmony_ci}; 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci&main_pmx0 { 3062306a36Sopenharmony_ci main_m2_enable_pins_default: main-m2-enable-default-pins { 3162306a36Sopenharmony_ci pinctrl-single,pins = < 3262306a36Sopenharmony_ci AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ 3362306a36Sopenharmony_ci >; 3462306a36Sopenharmony_ci }; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci main_bkey_pcie_reset: main-bkey-pcie-reset-default-pins { 3762306a36Sopenharmony_ci pinctrl-single,pins = < 3862306a36Sopenharmony_ci AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */ 3962306a36Sopenharmony_ci >; 4062306a36Sopenharmony_ci }; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci main_pmx0_m2_config_pins_default: main-pmx0-m2-config-default-pins { 4362306a36Sopenharmony_ci pinctrl-single,pins = < 4462306a36Sopenharmony_ci AM65X_IOPAD(0x01c8, PIN_INPUT_PULLUP, 7) /* (AE13) GPIO1_18 */ 4562306a36Sopenharmony_ci AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */ 4662306a36Sopenharmony_ci >; 4762306a36Sopenharmony_ci }; 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci main_m2_pcie_mux_control: main-m2-pcie-mux-control-default-pins { 5062306a36Sopenharmony_ci pinctrl-single,pins = < 5162306a36Sopenharmony_ci AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7) /* (AG22) GPIO0_82 */ 5262306a36Sopenharmony_ci AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7) /* (AE20) GPIO0_88 */ 5362306a36Sopenharmony_ci AM65X_IOPAD(0x0164, PIN_INPUT_PULLUP, 7) /* (AF19) GPIO0_89 */ 5462306a36Sopenharmony_ci >; 5562306a36Sopenharmony_ci }; 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci&main_pmx1 { 5962306a36Sopenharmony_ci main_pmx1_m2_config_pins_default: main-pmx1-m2-config-default-pins { 6062306a36Sopenharmony_ci pinctrl-single,pins = < 6162306a36Sopenharmony_ci AM65X_IOPAD(0x0018, PIN_INPUT_PULLUP, 7) /* (B22) GPIO1_88 */ 6262306a36Sopenharmony_ci AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */ 6362306a36Sopenharmony_ci >; 6462306a36Sopenharmony_ci }; 6562306a36Sopenharmony_ci}; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci&main_gpio0 { 6862306a36Sopenharmony_ci pinctrl-names = "default"; 6962306a36Sopenharmony_ci pinctrl-0 = 7062306a36Sopenharmony_ci <&main_m2_pcie_mux_control>, 7162306a36Sopenharmony_ci <&arduino_io_d4_to_d9_pins_default>; 7262306a36Sopenharmony_ci}; 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci&main_gpio1 { 7562306a36Sopenharmony_ci pinctrl-names = "default"; 7662306a36Sopenharmony_ci pinctrl-0 = 7762306a36Sopenharmony_ci <&main_m2_enable_pins_default>, 7862306a36Sopenharmony_ci <&main_pmx0_m2_config_pins_default>, 7962306a36Sopenharmony_ci <&main_pmx1_m2_config_pins_default>, 8062306a36Sopenharmony_ci <&cp2102n_reset_pin_default>; 8162306a36Sopenharmony_ci}; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci/* 8462306a36Sopenharmony_ci * Base configuration for B-key slot with PCIe x2, E-key with USB 2.0 only. 8562306a36Sopenharmony_ci * Firmware switches to other modes via device tree overlays. 8662306a36Sopenharmony_ci */ 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci&serdes0 { 8962306a36Sopenharmony_ci assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; 9062306a36Sopenharmony_ci assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; 9162306a36Sopenharmony_ci}; 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci&pcie0_rc { 9462306a36Sopenharmony_ci pinctrl-names = "default"; 9562306a36Sopenharmony_ci pinctrl-0 = <&main_bkey_pcie_reset>; 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci num-lanes = <2>; 9862306a36Sopenharmony_ci phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>; 9962306a36Sopenharmony_ci phy-names = "pcie-phy0","pcie-phy1"; 10062306a36Sopenharmony_ci reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; 10162306a36Sopenharmony_ci status = "okay"; 10262306a36Sopenharmony_ci}; 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_ci&pcie1_rc { 10562306a36Sopenharmony_ci status = "disabled"; 10662306a36Sopenharmony_ci}; 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ci&dwc3_0 { 10962306a36Sopenharmony_ci assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ 11062306a36Sopenharmony_ci <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ 11162306a36Sopenharmony_ci /delete-property/ phys; 11262306a36Sopenharmony_ci /delete-property/ phy-names; 11362306a36Sopenharmony_ci}; 11462306a36Sopenharmony_ci 11562306a36Sopenharmony_ci&usb0 { 11662306a36Sopenharmony_ci maximum-speed = "high-speed"; 11762306a36Sopenharmony_ci /delete-property/ snps,dis-u1-entry-quirk; 11862306a36Sopenharmony_ci /delete-property/ snps,dis-u2-entry-quirk; 11962306a36Sopenharmony_ci}; 120