162306a36Sopenharmony_ci/*
262306a36Sopenharmony_ci * Spreadtrum Sharkl64 platform DTS file
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Copyright (C) 2014, Spreadtrum Communications Inc.
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * This file is licensed under a dual GPLv2 or X11 license.
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci/ {
1062306a36Sopenharmony_ci	interrupt-parent = <&gic>;
1162306a36Sopenharmony_ci	#address-cells = <2>;
1262306a36Sopenharmony_ci	#size-cells = <2>;
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci	soc {
1562306a36Sopenharmony_ci		compatible = "simple-bus";
1662306a36Sopenharmony_ci		#address-cells = <2>;
1762306a36Sopenharmony_ci		#size-cells = <2>;
1862306a36Sopenharmony_ci		ranges;
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci		ap-apb {
2162306a36Sopenharmony_ci			compatible = "simple-bus";
2262306a36Sopenharmony_ci			#address-cells = <2>;
2362306a36Sopenharmony_ci			#size-cells = <2>;
2462306a36Sopenharmony_ci			ranges;
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci			uart0: serial@70000000 {
2762306a36Sopenharmony_ci				compatible = "sprd,sc9836-uart";
2862306a36Sopenharmony_ci				reg = <0 0x70000000 0 0x100>;
2962306a36Sopenharmony_ci				interrupts = <0 2 0xf04>;
3062306a36Sopenharmony_ci				clocks = <&clk26mhz>;
3162306a36Sopenharmony_ci				status = "disabled";
3262306a36Sopenharmony_ci			};
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci			uart1: serial@70100000 {
3562306a36Sopenharmony_ci				compatible = "sprd,sc9836-uart";
3662306a36Sopenharmony_ci				reg = <0 0x70100000 0 0x100>;
3762306a36Sopenharmony_ci				interrupts = <0 3 0xf04>;
3862306a36Sopenharmony_ci				clocks = <&clk26mhz>;
3962306a36Sopenharmony_ci				status = "disabled";
4062306a36Sopenharmony_ci			};
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci			uart2: serial@70200000 {
4362306a36Sopenharmony_ci				compatible = "sprd,sc9836-uart";
4462306a36Sopenharmony_ci				reg = <0 0x70200000 0 0x100>;
4562306a36Sopenharmony_ci				interrupts = <0 4 0xf04>;
4662306a36Sopenharmony_ci				clocks = <&clk26mhz>;
4762306a36Sopenharmony_ci				status = "disabled";
4862306a36Sopenharmony_ci			};
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci			uart3: serial@70300000 {
5162306a36Sopenharmony_ci				compatible = "sprd,sc9836-uart";
5262306a36Sopenharmony_ci				reg = <0 0x70300000 0 0x100>;
5362306a36Sopenharmony_ci				interrupts = <0 5 0xf04>;
5462306a36Sopenharmony_ci				clocks = <&clk26mhz>;
5562306a36Sopenharmony_ci				status = "disabled";
5662306a36Sopenharmony_ci			};
5762306a36Sopenharmony_ci		};
5862306a36Sopenharmony_ci	};
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci	clk26mhz: clk26mhz {
6162306a36Sopenharmony_ci		compatible = "fixed-clock";
6262306a36Sopenharmony_ci		#clock-cells = <0>;
6362306a36Sopenharmony_ci		clock-frequency = <26000000>;
6462306a36Sopenharmony_ci	};
6562306a36Sopenharmony_ci};
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