162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci
362306a36Sopenharmony_ci/dts-v1/;
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci#include "rk3566-soquartz.dtsi"
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci/ {
862306a36Sopenharmony_ci	model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
962306a36Sopenharmony_ci	compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci	/* labeled +12v in schematic */
1262306a36Sopenharmony_ci	vcc12v_dcin: vcc12v-dcin-regulator {
1362306a36Sopenharmony_ci		compatible = "regulator-fixed";
1462306a36Sopenharmony_ci		regulator-name = "vcc12v_dcin";
1562306a36Sopenharmony_ci		regulator-always-on;
1662306a36Sopenharmony_ci		regulator-boot-on;
1762306a36Sopenharmony_ci		regulator-min-microvolt = <12000000>;
1862306a36Sopenharmony_ci		regulator-max-microvolt = <12000000>;
1962306a36Sopenharmony_ci	};
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci	/* labeled +5v in schematic */
2262306a36Sopenharmony_ci	vcc_5v: vcc-5v-regulator {
2362306a36Sopenharmony_ci		compatible = "regulator-fixed";
2462306a36Sopenharmony_ci		regulator-name = "vcc_5v";
2562306a36Sopenharmony_ci		regulator-always-on;
2662306a36Sopenharmony_ci		regulator-boot-on;
2762306a36Sopenharmony_ci		regulator-min-microvolt = <5000000>;
2862306a36Sopenharmony_ci		regulator-max-microvolt = <5000000>;
2962306a36Sopenharmony_ci		vin-supply = <&vcc12v_dcin>;
3062306a36Sopenharmony_ci	};
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci	vcc_sd_pwr: vcc-sd-pwr-regulator {
3362306a36Sopenharmony_ci		compatible = "regulator-fixed";
3462306a36Sopenharmony_ci		regulator-name = "vcc_sd_pwr";
3562306a36Sopenharmony_ci		regulator-always-on;
3662306a36Sopenharmony_ci		regulator-boot-on;
3762306a36Sopenharmony_ci		regulator-min-microvolt = <3300000>;
3862306a36Sopenharmony_ci		regulator-max-microvolt = <3300000>;
3962306a36Sopenharmony_ci		vin-supply = <&vcc3v3_sys>;
4062306a36Sopenharmony_ci	};
4162306a36Sopenharmony_ci};
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci/* phy for pcie */
4462306a36Sopenharmony_ci&combphy2 {
4562306a36Sopenharmony_ci	phy-supply = <&vcc3v3_sys>;
4662306a36Sopenharmony_ci	status = "okay";
4762306a36Sopenharmony_ci};
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci&gmac1 {
5062306a36Sopenharmony_ci	status = "okay";
5162306a36Sopenharmony_ci};
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci/*
5462306a36Sopenharmony_ci * i2c1 is exposed on CM1 / Module1A
5562306a36Sopenharmony_ci * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
5662306a36Sopenharmony_ci * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
5762306a36Sopenharmony_ci */
5862306a36Sopenharmony_ci&i2c1 {
5962306a36Sopenharmony_ci	status = "okay";
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci	/*
6262306a36Sopenharmony_ci	 * the rtc interrupt is tied to PMIC_PWRON,
6362306a36Sopenharmony_ci	 * it will force reset the board if triggered.
6462306a36Sopenharmony_ci	 */
6562306a36Sopenharmony_ci	pcf85063: rtc@51 {
6662306a36Sopenharmony_ci		compatible = "nxp,pcf85063";
6762306a36Sopenharmony_ci		reg = <0x51>;
6862306a36Sopenharmony_ci	};
6962306a36Sopenharmony_ci};
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci/*
7262306a36Sopenharmony_ci * i2c2 is exposed on CM1 / Module1A - to PI40
7362306a36Sopenharmony_ci * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
7462306a36Sopenharmony_ci * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
7562306a36Sopenharmony_ci */
7662306a36Sopenharmony_ci&i2c2 {
7762306a36Sopenharmony_ci	status = "disabled";
7862306a36Sopenharmony_ci};
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci/*
8162306a36Sopenharmony_ci * i2c3 is exposed on CM1 / Module1A - to PI40
8262306a36Sopenharmony_ci * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
8362306a36Sopenharmony_ci * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
8462306a36Sopenharmony_ci */
8562306a36Sopenharmony_ci&i2c3 {
8662306a36Sopenharmony_ci	status = "disabled";
8762306a36Sopenharmony_ci};
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci/*
9062306a36Sopenharmony_ci * i2c4 is exposed on CM2 / Module1B - to PI40
9162306a36Sopenharmony_ci * pin 45 - GPIO24 - i2c4_scl_m1
9262306a36Sopenharmony_ci * pin 47 - GPIO23 - i2c4_sda_m1
9362306a36Sopenharmony_ci */
9462306a36Sopenharmony_ci&i2c4 {
9562306a36Sopenharmony_ci	status = "disabled";
9662306a36Sopenharmony_ci};
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci/*
9962306a36Sopenharmony_ci * i2s1_8ch is exposed on CM1 / Module1A - to PI40
10062306a36Sopenharmony_ci * pin 24 - GPIO26 - i2s1_sdi1_m1
10162306a36Sopenharmony_ci * pin 25 - GPIO21 - i2s1_sdo0_m1
10262306a36Sopenharmony_ci * pin 26 - GPIO19 - i2s1_lrck_tx_m1
10362306a36Sopenharmony_ci * pin 27 - GPIO20 - i2s1_sdi0_m1
10462306a36Sopenharmony_ci * pin 29 - GPIO16 - i2s1_sdi3_m1
10562306a36Sopenharmony_ci * pin 30 - GPIO6  - i2s1_sdi2_m1
10662306a36Sopenharmony_ci * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
10762306a36Sopenharmony_ci * pin 41 - GPIO25 - i2s1_sdo2_m1
10862306a36Sopenharmony_ci * pin 49 - GPIO18 - i2s1_sclk_tx_m1
10962306a36Sopenharmony_ci * pin 50 - GPIO17 - i2s1_mclk_m1
11062306a36Sopenharmony_ci * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
11162306a36Sopenharmony_ci */
11262306a36Sopenharmony_ci&i2s1_8ch {
11362306a36Sopenharmony_ci	status = "disabled";
11462306a36Sopenharmony_ci};
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_ci&led_diy {
11762306a36Sopenharmony_ci	status = "okay";
11862306a36Sopenharmony_ci};
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ci&led_work {
12162306a36Sopenharmony_ci	status = "okay";
12262306a36Sopenharmony_ci};
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci&pcie2x1 {
12562306a36Sopenharmony_ci	vpcie3v3-supply = <&vcc_3v3>;
12662306a36Sopenharmony_ci	status = "okay";
12762306a36Sopenharmony_ci};
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ci&rgmii_phy1 {
13062306a36Sopenharmony_ci	status = "okay";
13162306a36Sopenharmony_ci};
13262306a36Sopenharmony_ci
13362306a36Sopenharmony_ci/*
13462306a36Sopenharmony_ci * saradc is exposed on CM1 / Module1A - to J2
13562306a36Sopenharmony_ci * pin 94 - AIN1 - saradc_vin3
13662306a36Sopenharmony_ci * pin 96 - AIN0 - saradc_vin2
13762306a36Sopenharmony_ci */
13862306a36Sopenharmony_ci&saradc {
13962306a36Sopenharmony_ci	status = "disabled";
14062306a36Sopenharmony_ci};
14162306a36Sopenharmony_ci
14262306a36Sopenharmony_ci&sdmmc0 {
14362306a36Sopenharmony_ci	vmmc-supply = <&vcc_sd_pwr>;
14462306a36Sopenharmony_ci	status = "okay";
14562306a36Sopenharmony_ci};
14662306a36Sopenharmony_ci
14762306a36Sopenharmony_ci/*
14862306a36Sopenharmony_ci *  spi3 is exposed on CM1 / Module1A - to PI40
14962306a36Sopenharmony_ci * pin 37 - GPIO7  - spi3_cs1_m0
15062306a36Sopenharmony_ci * pin 38 - GPIO11 - spi3_clk_m0
15162306a36Sopenharmony_ci * pin 39 - GPIO8  - spi3_cs0_m0
15262306a36Sopenharmony_ci * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
15362306a36Sopenharmony_ci * pin 44 - GPIO10 - spi3_mosi_m0
15462306a36Sopenharmony_ci */
15562306a36Sopenharmony_ci&spi3 {
15662306a36Sopenharmony_ci	status = "disabled";
15762306a36Sopenharmony_ci};
15862306a36Sopenharmony_ci
15962306a36Sopenharmony_ci/*
16062306a36Sopenharmony_ci * uart2 is exposed on CM1 / Module1A - to PI40
16162306a36Sopenharmony_ci * pin 51 - GPIO15 - uart2_rx_m0
16262306a36Sopenharmony_ci * pin 55 - GPIO14 - uart2_tx_m0
16362306a36Sopenharmony_ci */
16462306a36Sopenharmony_ci&uart2 {
16562306a36Sopenharmony_ci	status = "okay";
16662306a36Sopenharmony_ci};
16762306a36Sopenharmony_ci
16862306a36Sopenharmony_ci/*
16962306a36Sopenharmony_ci * uart7 is exposed on CM1 / Module1A - to PI40
17062306a36Sopenharmony_ci * pin 46 - GPIO22 - uart7_tx_m2
17162306a36Sopenharmony_ci * pin 47 - GPIO23 - uart7_rx_m2
17262306a36Sopenharmony_ci */
17362306a36Sopenharmony_ci&uart7 {
17462306a36Sopenharmony_ci	status = "okay";
17562306a36Sopenharmony_ci};
17662306a36Sopenharmony_ci
17762306a36Sopenharmony_ci&usb2phy0 {
17862306a36Sopenharmony_ci	status = "okay";
17962306a36Sopenharmony_ci};
18062306a36Sopenharmony_ci
18162306a36Sopenharmony_ci&usb2phy0_otg {
18262306a36Sopenharmony_ci	phy-supply = <&vcc_5v>;
18362306a36Sopenharmony_ci	status = "okay";
18462306a36Sopenharmony_ci};
18562306a36Sopenharmony_ci
18662306a36Sopenharmony_ci&usb_host0_xhci {
18762306a36Sopenharmony_ci	status = "okay";
18862306a36Sopenharmony_ci};
18962306a36Sopenharmony_ci
19062306a36Sopenharmony_ci&vbus {
19162306a36Sopenharmony_ci	vin-supply = <&vcc_5v>;
19262306a36Sopenharmony_ci};
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