162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
462306a36Sopenharmony_ci */
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci/dts-v1/;
762306a36Sopenharmony_ci#include "sparx5_pcb_common.dtsi"
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci/ {
1062306a36Sopenharmony_ci	model = "Sparx5 PCB125 Reference Board";
1162306a36Sopenharmony_ci	compatible = "microchip,sparx5-pcb125", "microchip,sparx5";
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci	memory@0 {
1462306a36Sopenharmony_ci		device_type = "memory";
1562306a36Sopenharmony_ci		reg = <0x00000000 0x00000000 0x10000000>;
1662306a36Sopenharmony_ci	};
1762306a36Sopenharmony_ci};
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci&gpio {
2062306a36Sopenharmony_ci	emmc_pins: emmc-pins {
2162306a36Sopenharmony_ci		/* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
2262306a36Sopenharmony_ci		 * (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
2362306a36Sopenharmony_ci		 */
2462306a36Sopenharmony_ci		pins = "GPIO_34", "GPIO_38", "GPIO_39",
2562306a36Sopenharmony_ci			"GPIO_40", "GPIO_41", "GPIO_42",
2662306a36Sopenharmony_ci			"GPIO_43", "GPIO_44", "GPIO_45",
2762306a36Sopenharmony_ci			"GPIO_46", "GPIO_47";
2862306a36Sopenharmony_ci		drive-strength = <3>;
2962306a36Sopenharmony_ci		function = "emmc";
3062306a36Sopenharmony_ci	};
3162306a36Sopenharmony_ci};
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci&sdhci0 {
3462306a36Sopenharmony_ci	status = "okay";
3562306a36Sopenharmony_ci	bus-width = <8>;
3662306a36Sopenharmony_ci	non-removable;
3762306a36Sopenharmony_ci	pinctrl-0 = <&emmc_pins>;
3862306a36Sopenharmony_ci	max-frequency = <8000000>;
3962306a36Sopenharmony_ci	microchip,clock-delay = <10>;
4062306a36Sopenharmony_ci};
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci&spi0 {
4362306a36Sopenharmony_ci	status = "okay";
4462306a36Sopenharmony_ci	spi@0 {
4562306a36Sopenharmony_ci		compatible = "spi-mux";
4662306a36Sopenharmony_ci		mux-controls = <&mux>;
4762306a36Sopenharmony_ci		#address-cells = <1>;
4862306a36Sopenharmony_ci		#size-cells = <0>;
4962306a36Sopenharmony_ci		reg = <0>;	/* CS0 */
5062306a36Sopenharmony_ci		flash@9 {
5162306a36Sopenharmony_ci			compatible = "jedec,spi-nor";
5262306a36Sopenharmony_ci			spi-max-frequency = <8000000>;
5362306a36Sopenharmony_ci			reg = <0x9>;	/* SPI */
5462306a36Sopenharmony_ci		};
5562306a36Sopenharmony_ci	};
5662306a36Sopenharmony_ci	spi@1 {
5762306a36Sopenharmony_ci		compatible = "spi-mux";
5862306a36Sopenharmony_ci		mux-controls = <&mux 0>;
5962306a36Sopenharmony_ci		#address-cells = <1>;
6062306a36Sopenharmony_ci		#size-cells = <0>;
6162306a36Sopenharmony_ci		reg = <1>; /* CS1 */
6262306a36Sopenharmony_ci		flash@9 {
6362306a36Sopenharmony_ci			compatible = "spi-nand";
6462306a36Sopenharmony_ci			pinctrl-0 = <&cs1_pins>;
6562306a36Sopenharmony_ci			pinctrl-names = "default";
6662306a36Sopenharmony_ci			spi-max-frequency = <8000000>;
6762306a36Sopenharmony_ci			reg = <0x9>;	/* SPI */
6862306a36Sopenharmony_ci		};
6962306a36Sopenharmony_ci	};
7062306a36Sopenharmony_ci};
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ci&sgpio0 {
7362306a36Sopenharmony_ci	status = "okay";
7462306a36Sopenharmony_ci	microchip,sgpio-port-ranges = <0 23>;
7562306a36Sopenharmony_ci};
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci&i2c1 {
7862306a36Sopenharmony_ci	status = "okay";
7962306a36Sopenharmony_ci};
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