162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0 OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2021 MediaTek Inc. 462306a36Sopenharmony_ci * Author: Seiya Wang <seiya.wang@mediatek.com> 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci/dts-v1/; 762306a36Sopenharmony_ci#include "mt8195.dtsi" 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci/ { 1062306a36Sopenharmony_ci model = "MediaTek MT8195 evaluation board"; 1162306a36Sopenharmony_ci compatible = "mediatek,mt8195-evb", "mediatek,mt8195"; 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci aliases { 1462306a36Sopenharmony_ci serial0 = &uart0; 1562306a36Sopenharmony_ci }; 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci chosen { 1862306a36Sopenharmony_ci stdout-path = "serial0:921600n8"; 1962306a36Sopenharmony_ci }; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci memory@40000000 { 2262306a36Sopenharmony_ci device_type = "memory"; 2362306a36Sopenharmony_ci reg = <0 0x40000000 0 0x80000000>; 2462306a36Sopenharmony_ci }; 2562306a36Sopenharmony_ci}; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci&auxadc { 2862306a36Sopenharmony_ci status = "okay"; 2962306a36Sopenharmony_ci}; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci&i2c0 { 3262306a36Sopenharmony_ci pinctrl-names = "default"; 3362306a36Sopenharmony_ci pinctrl-0 = <&i2c0_pin>; 3462306a36Sopenharmony_ci clock-frequency = <100000>; 3562306a36Sopenharmony_ci status = "okay"; 3662306a36Sopenharmony_ci}; 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci&i2c1 { 3962306a36Sopenharmony_ci pinctrl-names = "default"; 4062306a36Sopenharmony_ci pinctrl-0 = <&i2c1_pin>; 4162306a36Sopenharmony_ci clock-frequency = <400000>; 4262306a36Sopenharmony_ci status = "okay"; 4362306a36Sopenharmony_ci}; 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci&i2c4 { 4662306a36Sopenharmony_ci pinctrl-names = "default"; 4762306a36Sopenharmony_ci pinctrl-0 = <&i2c4_pin>; 4862306a36Sopenharmony_ci clock-frequency = <400000>; 4962306a36Sopenharmony_ci status = "okay"; 5062306a36Sopenharmony_ci}; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci&i2c6 { 5362306a36Sopenharmony_ci pinctrl-names = "default"; 5462306a36Sopenharmony_ci pinctrl-0 = <&i2c6_pin>; 5562306a36Sopenharmony_ci clock-frequency = <400000>; 5662306a36Sopenharmony_ci status = "okay"; 5762306a36Sopenharmony_ci}; 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ci&nor_flash { 6062306a36Sopenharmony_ci status = "okay"; 6162306a36Sopenharmony_ci pinctrl-names = "default"; 6262306a36Sopenharmony_ci pinctrl-0 = <&nor_pins_default>; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci flash@0 { 6562306a36Sopenharmony_ci compatible = "jedec,spi-nor"; 6662306a36Sopenharmony_ci reg = <0>; 6762306a36Sopenharmony_ci spi-max-frequency = <50000000>; 6862306a36Sopenharmony_ci }; 6962306a36Sopenharmony_ci}; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci&pio { 7262306a36Sopenharmony_ci i2c0_pin: i2c0-pins { 7362306a36Sopenharmony_ci pins { 7462306a36Sopenharmony_ci pinmux = <PINMUX_GPIO8__FUNC_SDA0>, 7562306a36Sopenharmony_ci <PINMUX_GPIO9__FUNC_SCL0>; 7662306a36Sopenharmony_ci bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 7762306a36Sopenharmony_ci mediatek,drive-strength-adv = <0>; 7862306a36Sopenharmony_ci drive-strength = <6>; 7962306a36Sopenharmony_ci }; 8062306a36Sopenharmony_ci }; 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci i2c1_pin: i2c1-pins { 8362306a36Sopenharmony_ci pins { 8462306a36Sopenharmony_ci pinmux = <PINMUX_GPIO10__FUNC_SDA1>, 8562306a36Sopenharmony_ci <PINMUX_GPIO11__FUNC_SCL1>; 8662306a36Sopenharmony_ci bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 8762306a36Sopenharmony_ci mediatek,drive-strength-adv = <0>; 8862306a36Sopenharmony_ci drive-strength = <6>; 8962306a36Sopenharmony_ci }; 9062306a36Sopenharmony_ci }; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci i2c4_pin: i2c4-pins { 9362306a36Sopenharmony_ci pins { 9462306a36Sopenharmony_ci pinmux = <PINMUX_GPIO16__FUNC_SDA4>, 9562306a36Sopenharmony_ci <PINMUX_GPIO17__FUNC_SCL4>; 9662306a36Sopenharmony_ci bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 9762306a36Sopenharmony_ci mediatek,drive-strength-adv = <7>; 9862306a36Sopenharmony_ci }; 9962306a36Sopenharmony_ci }; 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci i2c6_pin: i2c6-pins { 10262306a36Sopenharmony_ci pins { 10362306a36Sopenharmony_ci pinmux = <PINMUX_GPIO25__FUNC_SDA6>, 10462306a36Sopenharmony_ci <PINMUX_GPIO26__FUNC_SCL6>; 10562306a36Sopenharmony_ci bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 10662306a36Sopenharmony_ci }; 10762306a36Sopenharmony_ci }; 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ci i2c7_pin: i2c7-pins { 11062306a36Sopenharmony_ci pins { 11162306a36Sopenharmony_ci pinmux = <PINMUX_GPIO27__FUNC_SCL7>, 11262306a36Sopenharmony_ci <PINMUX_GPIO28__FUNC_SDA7>; 11362306a36Sopenharmony_ci bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 11462306a36Sopenharmony_ci }; 11562306a36Sopenharmony_ci }; 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci nor_pins_default: nor-pins { 11862306a36Sopenharmony_ci pins0 { 11962306a36Sopenharmony_ci pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>, 12062306a36Sopenharmony_ci <PINMUX_GPIO141__FUNC_SPINOR_CK>, 12162306a36Sopenharmony_ci <PINMUX_GPIO143__FUNC_SPINOR_IO1>; 12262306a36Sopenharmony_ci bias-pull-down; 12362306a36Sopenharmony_ci }; 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_ci pins1 { 12662306a36Sopenharmony_ci pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>, 12762306a36Sopenharmony_ci <PINMUX_GPIO130__FUNC_SPINOR_IO2>, 12862306a36Sopenharmony_ci <PINMUX_GPIO131__FUNC_SPINOR_IO3>; 12962306a36Sopenharmony_ci bias-pull-up; 13062306a36Sopenharmony_ci }; 13162306a36Sopenharmony_ci }; 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_ci uart0_pin: uart0-pins { 13462306a36Sopenharmony_ci pins { 13562306a36Sopenharmony_ci pinmux = <PINMUX_GPIO98__FUNC_UTXD0>, 13662306a36Sopenharmony_ci <PINMUX_GPIO99__FUNC_URXD0>; 13762306a36Sopenharmony_ci }; 13862306a36Sopenharmony_ci }; 13962306a36Sopenharmony_ci}; 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ci&u3phy0 { 14262306a36Sopenharmony_ci status = "okay"; 14362306a36Sopenharmony_ci}; 14462306a36Sopenharmony_ci 14562306a36Sopenharmony_ci&u3phy1 { 14662306a36Sopenharmony_ci status = "okay"; 14762306a36Sopenharmony_ci}; 14862306a36Sopenharmony_ci 14962306a36Sopenharmony_ci&u3phy2 { 15062306a36Sopenharmony_ci status = "okay"; 15162306a36Sopenharmony_ci}; 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_ci&u3phy3 { 15462306a36Sopenharmony_ci status = "okay"; 15562306a36Sopenharmony_ci}; 15662306a36Sopenharmony_ci 15762306a36Sopenharmony_ci&uart0 { 15862306a36Sopenharmony_ci pinctrl-names = "default"; 15962306a36Sopenharmony_ci pinctrl-0 = <&uart0_pin>; 16062306a36Sopenharmony_ci status = "okay"; 16162306a36Sopenharmony_ci}; 16262306a36Sopenharmony_ci 16362306a36Sopenharmony_ci&xhci0 { 16462306a36Sopenharmony_ci status = "okay"; 16562306a36Sopenharmony_ci}; 16662306a36Sopenharmony_ci 16762306a36Sopenharmony_ci&xhci1 { 16862306a36Sopenharmony_ci status = "okay"; 16962306a36Sopenharmony_ci}; 17062306a36Sopenharmony_ci 17162306a36Sopenharmony_ci&xhci2 { 17262306a36Sopenharmony_ci status = "okay"; 17362306a36Sopenharmony_ci}; 17462306a36Sopenharmony_ci 17562306a36Sopenharmony_ci&xhci3 { 17662306a36Sopenharmony_ci /* This controller is connected with a BT device. 17762306a36Sopenharmony_ci * Disable usb2 lpm to prevent known issues. 17862306a36Sopenharmony_ci */ 17962306a36Sopenharmony_ci usb2-lpm-disable; 18062306a36Sopenharmony_ci status = "okay"; 18162306a36Sopenharmony_ci}; 182