162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2020 Marvell International Ltd. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Device tree for the CN9130-DB board (setup "B"). 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include "cn9130-db.dtsi" 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci/ { 1162306a36Sopenharmony_ci model = "Marvell Armada CN9130-DB setup B"; 1262306a36Sopenharmony_ci}; 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/* Setup B has NAND flash as a boot device, while regular setup uses SPI flash. 1562306a36Sopenharmony_ci * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated 1662306a36Sopenharmony_ci * simultaneously. When NAND controller is enabled, SPI1 should be disabled. 1762306a36Sopenharmony_ci */ 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci&cp0_nand_controller { 2062306a36Sopenharmony_ci status = "okay"; 2162306a36Sopenharmony_ci}; 2262306a36Sopenharmony_ci 23