162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2019 Toradex 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#include <dt-bindings/input/linux-event-codes.h> 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci/ { 962306a36Sopenharmony_ci aliases { 1062306a36Sopenharmony_ci rtc0 = &rtc_i2c; 1162306a36Sopenharmony_ci rtc1 = &rtc; 1262306a36Sopenharmony_ci }; 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci /* fixed crystal dedicated to mcp25xx */ 1562306a36Sopenharmony_ci clk16m: clock-16mhz { 1662306a36Sopenharmony_ci compatible = "fixed-clock"; 1762306a36Sopenharmony_ci #clock-cells = <0>; 1862306a36Sopenharmony_ci clock-frequency = <16000000>; 1962306a36Sopenharmony_ci }; 2062306a36Sopenharmony_ci}; 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci&colibri_gpio_keys { 2362306a36Sopenharmony_ci status = "okay"; 2462306a36Sopenharmony_ci}; 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci&i2c1 { 2762306a36Sopenharmony_ci status = "okay"; 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci /* M41T0M6 real time clock on carrier board */ 3062306a36Sopenharmony_ci rtc_i2c: rtc@68 { 3162306a36Sopenharmony_ci compatible = "st,m41t0"; 3262306a36Sopenharmony_ci reg = <0x68>; 3362306a36Sopenharmony_ci }; 3462306a36Sopenharmony_ci}; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci&iomuxc { 3762306a36Sopenharmony_ci pinctrl-names = "default"; 3862306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>, 3962306a36Sopenharmony_ci <&pinctrl_lpspi2_cs2>; 4062306a36Sopenharmony_ci}; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci/* Colibri SPI */ 4362306a36Sopenharmony_ci&lpspi2 { 4462306a36Sopenharmony_ci status = "okay"; 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci mcp2515: can@0 { 4762306a36Sopenharmony_ci compatible = "microchip,mcp2515"; 4862306a36Sopenharmony_ci reg = <0>; 4962306a36Sopenharmony_ci interrupt-parent = <&lsio_gpio3>; 5062306a36Sopenharmony_ci interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 5162306a36Sopenharmony_ci pinctrl-0 = <&pinctrl_can_int>; 5262306a36Sopenharmony_ci pinctrl-names = "default"; 5362306a36Sopenharmony_ci clocks = <&clk16m>; 5462306a36Sopenharmony_ci spi-max-frequency = <10000000>; 5562306a36Sopenharmony_ci }; 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci/* Colibri UART_B */ 5962306a36Sopenharmony_ci&lpuart0 { 6062306a36Sopenharmony_ci status = "okay"; 6162306a36Sopenharmony_ci}; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci/* Colibri UART_C */ 6462306a36Sopenharmony_ci&lpuart2 { 6562306a36Sopenharmony_ci status = "okay"; 6662306a36Sopenharmony_ci}; 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci/* Colibri PWM_B */ 6962306a36Sopenharmony_ci&lsio_pwm0 { 7062306a36Sopenharmony_ci status = "okay"; 7162306a36Sopenharmony_ci}; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci/* Colibri PWM_C */ 7462306a36Sopenharmony_ci&lsio_pwm1 { 7562306a36Sopenharmony_ci status = "okay"; 7662306a36Sopenharmony_ci}; 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci/* Colibri PWM_D */ 7962306a36Sopenharmony_ci&lsio_pwm2 { 8062306a36Sopenharmony_ci status = "okay"; 8162306a36Sopenharmony_ci}; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci/* Colibri UART_A */ 8462306a36Sopenharmony_ci&lpuart3 { 8562306a36Sopenharmony_ci status = "okay"; 8662306a36Sopenharmony_ci}; 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci/* Colibri FastEthernet */ 8962306a36Sopenharmony_ci&fec1 { 9062306a36Sopenharmony_ci status = "okay"; 9162306a36Sopenharmony_ci}; 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci/* Colibri SD/MMC Card */ 9462306a36Sopenharmony_ci&usdhc2 { 9562306a36Sopenharmony_ci status = "okay"; 9662306a36Sopenharmony_ci}; 97