162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree fragment for LS1028A QDS board, serdes 69xx
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright 2019-2021 NXP
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * Requires a LS1028A QDS board with lane B rework.
862306a36Sopenharmony_ci * Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2.
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/dts-v1/;
1262306a36Sopenharmony_ci/plugin/;
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci&mdio_slot1 {
1562306a36Sopenharmony_ci	#address-cells = <1>;
1662306a36Sopenharmony_ci	#size-cells = <0>;
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci	slot1_sgmii: ethernet-phy@2 {
1962306a36Sopenharmony_ci		/* AQR112 */
2062306a36Sopenharmony_ci		reg = <0x2>;
2162306a36Sopenharmony_ci		compatible = "ethernet-phy-ieee802.3-c45";
2262306a36Sopenharmony_ci	};
2362306a36Sopenharmony_ci};
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci&enetc_port0 {
2662306a36Sopenharmony_ci	phy-handle = <&slot1_sgmii>;
2762306a36Sopenharmony_ci	phy-mode = "2500base-x";
2862306a36Sopenharmony_ci	status = "okay";
2962306a36Sopenharmony_ci};
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci&mdio_slot2 {
3262306a36Sopenharmony_ci	#address-cells = <1>;
3362306a36Sopenharmony_ci	#size-cells = <0>;
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci	/* 4 ports on VSC8514 */
3662306a36Sopenharmony_ci	slot2_qsgmii0: ethernet-phy@8 {
3762306a36Sopenharmony_ci		reg = <0x8>;
3862306a36Sopenharmony_ci	};
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci	slot2_qsgmii1: ethernet-phy@9 {
4162306a36Sopenharmony_ci		reg = <0x9>;
4262306a36Sopenharmony_ci	};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci	slot2_qsgmii2: ethernet-phy@a {
4562306a36Sopenharmony_ci		reg = <0xa>;
4662306a36Sopenharmony_ci	};
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci	slot2_qsgmii3: ethernet-phy@b {
4962306a36Sopenharmony_ci		reg = <0xb>;
5062306a36Sopenharmony_ci	};
5162306a36Sopenharmony_ci};
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci&mscc_felix_ports {
5462306a36Sopenharmony_ci	port@0 {
5562306a36Sopenharmony_ci		status = "okay";
5662306a36Sopenharmony_ci		phy-handle = <&slot2_qsgmii0>;
5762306a36Sopenharmony_ci		phy-mode = "qsgmii";
5862306a36Sopenharmony_ci		managed = "in-band-status";
5962306a36Sopenharmony_ci	};
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci	port@1 {
6262306a36Sopenharmony_ci		status = "okay";
6362306a36Sopenharmony_ci		phy-handle = <&slot2_qsgmii1>;
6462306a36Sopenharmony_ci		phy-mode = "qsgmii";
6562306a36Sopenharmony_ci		managed = "in-band-status";
6662306a36Sopenharmony_ci	};
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci	port@2 {
6962306a36Sopenharmony_ci		status = "okay";
7062306a36Sopenharmony_ci		phy-handle = <&slot2_qsgmii2>;
7162306a36Sopenharmony_ci		phy-mode = "qsgmii";
7262306a36Sopenharmony_ci		managed = "in-band-status";
7362306a36Sopenharmony_ci	};
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci	port@3 {
7662306a36Sopenharmony_ci		status = "okay";
7762306a36Sopenharmony_ci		phy-handle = <&slot2_qsgmii3>;
7862306a36Sopenharmony_ci		phy-mode = "qsgmii";
7962306a36Sopenharmony_ci		managed = "in-band-status";
8062306a36Sopenharmony_ci	};
8162306a36Sopenharmony_ci};
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ci&mscc_felix {
8462306a36Sopenharmony_ci	status = "okay";
8562306a36Sopenharmony_ci};
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