162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Samsung ExynosAutov9 SADK board device tree source 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2021 Samsung Electronics Co., Ltd. 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci/dts-v1/; 1062306a36Sopenharmony_ci#include "exynosautov9.dtsi" 1162306a36Sopenharmony_ci#include <dt-bindings/gpio/gpio.h> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/ { 1462306a36Sopenharmony_ci model = "Samsung ExynosAuto v9 SADK board"; 1562306a36Sopenharmony_ci compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9"; 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci #address-cells = <2>; 1862306a36Sopenharmony_ci #size-cells = <2>; 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci aliases { 2162306a36Sopenharmony_ci serial0 = &serial_0; 2262306a36Sopenharmony_ci }; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci chosen { 2562306a36Sopenharmony_ci stdout-path = &serial_0; 2662306a36Sopenharmony_ci }; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci memory@80000000 { 2962306a36Sopenharmony_ci device_type = "memory"; 3062306a36Sopenharmony_ci reg = <0x0 0x80000000 0x0 0x77000000>, 3162306a36Sopenharmony_ci <0x8 0x80000000 0x1 0x7ba00000>, 3262306a36Sopenharmony_ci <0xa 0x00000000 0x2 0x00000000>; 3362306a36Sopenharmony_ci }; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci ufs_0_fixed_vcc_reg: regulator-0 { 3662306a36Sopenharmony_ci compatible = "regulator-fixed"; 3762306a36Sopenharmony_ci regulator-name = "ufs-vcc"; 3862306a36Sopenharmony_ci gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>; 3962306a36Sopenharmony_ci regulator-boot-on; 4062306a36Sopenharmony_ci enable-active-high; 4162306a36Sopenharmony_ci }; 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci ufs_1_fixed_vcc_reg: regulator-1 { 4462306a36Sopenharmony_ci compatible = "regulator-fixed"; 4562306a36Sopenharmony_ci regulator-name = "ufs-vcc"; 4662306a36Sopenharmony_ci gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>; 4762306a36Sopenharmony_ci regulator-boot-on; 4862306a36Sopenharmony_ci enable-active-high; 4962306a36Sopenharmony_ci }; 5062306a36Sopenharmony_ci}; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci&pwm { 5362306a36Sopenharmony_ci pinctrl-names = "default"; 5462306a36Sopenharmony_ci pinctrl-0 = <&pwm_tout3>; 5562306a36Sopenharmony_ci status = "okay"; 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci&serial_0 { 5962306a36Sopenharmony_ci pinctrl-0 = <&uart0_bus_dual>; 6062306a36Sopenharmony_ci status = "okay"; 6162306a36Sopenharmony_ci}; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci&ufs_0_phy { 6462306a36Sopenharmony_ci status = "okay"; 6562306a36Sopenharmony_ci}; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci&ufs_1_phy { 6862306a36Sopenharmony_ci status = "okay"; 6962306a36Sopenharmony_ci}; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci&ufs_0 { 7262306a36Sopenharmony_ci status = "okay"; 7362306a36Sopenharmony_ci vcc-supply = <&ufs_0_fixed_vcc_reg>; 7462306a36Sopenharmony_ci}; 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci&ufs_1 { 7762306a36Sopenharmony_ci status = "okay"; 7862306a36Sopenharmony_ci vcc-supply = <&ufs_1_fixed_vcc_reg>; 7962306a36Sopenharmony_ci}; 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci&usi_0 { 8262306a36Sopenharmony_ci samsung,clkreq-on; /* needed for UART mode */ 8362306a36Sopenharmony_ci status = "okay"; 8462306a36Sopenharmony_ci}; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci&xtcxo { 8762306a36Sopenharmony_ci clock-frequency = <26000000>; 8862306a36Sopenharmony_ci}; 89