162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree Source for OMAP4 clock data
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2013 Texas Instruments, Inc.
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci&prm_clocks {
862306a36Sopenharmony_ci	div_ts_ck: div_ts_ck@1888 {
962306a36Sopenharmony_ci		#clock-cells = <0>;
1062306a36Sopenharmony_ci		compatible = "ti,divider-clock";
1162306a36Sopenharmony_ci		clock-output-names = "div_ts_ck";
1262306a36Sopenharmony_ci		clocks = <&l4_wkup_clk_mux_ck>;
1362306a36Sopenharmony_ci		ti,bit-shift = <24>;
1462306a36Sopenharmony_ci		reg = <0x1888>;
1562306a36Sopenharmony_ci		ti,dividers = <8>, <16>, <32>;
1662306a36Sopenharmony_ci	};
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci	bandgap_ts_fclk: bandgap_ts_fclk@1888 {
1962306a36Sopenharmony_ci		#clock-cells = <0>;
2062306a36Sopenharmony_ci		compatible = "ti,gate-clock";
2162306a36Sopenharmony_ci		clock-output-names = "bandgap_ts_fclk";
2262306a36Sopenharmony_ci		clocks = <&div_ts_ck>;
2362306a36Sopenharmony_ci		ti,bit-shift = <8>;
2462306a36Sopenharmony_ci		reg = <0x1888>;
2562306a36Sopenharmony_ci	};
2662306a36Sopenharmony_ci};
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