162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Device Tree Source for OMAP34xx/OMAP35xx SoC 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <dt-bindings/bus/ti-sysc.h> 962306a36Sopenharmony_ci#include <dt-bindings/media/omap3-isp.h> 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include "omap3.dtsi" 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/ { 1462306a36Sopenharmony_ci cpus { 1562306a36Sopenharmony_ci cpu: cpu@0 { 1662306a36Sopenharmony_ci /* OMAP343x/OMAP35xx variants OPP1-6 */ 1762306a36Sopenharmony_ci operating-points-v2 = <&cpu0_opp_table>; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci clock-latency = <300000>; /* From legacy driver */ 2062306a36Sopenharmony_ci #cooling-cells = <2>; 2162306a36Sopenharmony_ci }; 2262306a36Sopenharmony_ci }; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci cpu0_opp_table: opp-table { 2562306a36Sopenharmony_ci compatible = "operating-points-v2-ti-cpu"; 2662306a36Sopenharmony_ci syscon = <&scm_conf>; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci opp-125000000 { 2962306a36Sopenharmony_ci opp-hz = /bits/ 64 <125000000>; 3062306a36Sopenharmony_ci /* 3162306a36Sopenharmony_ci * we currently only select the max voltage from table 3262306a36Sopenharmony_ci * Table 3-3 of the omap3530 Data sheet (SPRS507F). 3362306a36Sopenharmony_ci * Format is: <target min max> 3462306a36Sopenharmony_ci */ 3562306a36Sopenharmony_ci opp-microvolt = <975000 975000 975000>; 3662306a36Sopenharmony_ci /* 3762306a36Sopenharmony_ci * first value is silicon revision bit mask 3862306a36Sopenharmony_ci * second one 720MHz Device Identification bit mask 3962306a36Sopenharmony_ci */ 4062306a36Sopenharmony_ci opp-supported-hw = <0xffffffff 3>; 4162306a36Sopenharmony_ci }; 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci opp-250000000 { 4462306a36Sopenharmony_ci opp-hz = /bits/ 64 <250000000>; 4562306a36Sopenharmony_ci opp-microvolt = <1075000 1075000 1075000>; 4662306a36Sopenharmony_ci opp-supported-hw = <0xffffffff 3>; 4762306a36Sopenharmony_ci opp-suspend; 4862306a36Sopenharmony_ci }; 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci opp-500000000 { 5162306a36Sopenharmony_ci opp-hz = /bits/ 64 <500000000>; 5262306a36Sopenharmony_ci opp-microvolt = <1200000 1200000 1200000>; 5362306a36Sopenharmony_ci opp-supported-hw = <0xffffffff 3>; 5462306a36Sopenharmony_ci }; 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci opp-550000000 { 5762306a36Sopenharmony_ci opp-hz = /bits/ 64 <550000000>; 5862306a36Sopenharmony_ci opp-microvolt = <1275000 1275000 1275000>; 5962306a36Sopenharmony_ci opp-supported-hw = <0xffffffff 3>; 6062306a36Sopenharmony_ci }; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci opp-600000000 { 6362306a36Sopenharmony_ci opp-hz = /bits/ 64 <600000000>; 6462306a36Sopenharmony_ci opp-microvolt = <1350000 1350000 1350000>; 6562306a36Sopenharmony_ci opp-supported-hw = <0xffffffff 3>; 6662306a36Sopenharmony_ci }; 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci opp-720000000 { 6962306a36Sopenharmony_ci opp-hz = /bits/ 64 <720000000>; 7062306a36Sopenharmony_ci opp-microvolt = <1350000 1350000 1350000>; 7162306a36Sopenharmony_ci /* only high-speed grade omap3530 devices */ 7262306a36Sopenharmony_ci opp-supported-hw = <0xffffffff 2>; 7362306a36Sopenharmony_ci turbo-mode; 7462306a36Sopenharmony_ci }; 7562306a36Sopenharmony_ci }; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci ocp@68000000 { 7862306a36Sopenharmony_ci omap3_pmx_core2: pinmux@480025d8 { 7962306a36Sopenharmony_ci compatible = "ti,omap3-padconf", "pinctrl-single"; 8062306a36Sopenharmony_ci reg = <0x480025d8 0x24>; 8162306a36Sopenharmony_ci #address-cells = <1>; 8262306a36Sopenharmony_ci #size-cells = <0>; 8362306a36Sopenharmony_ci #pinctrl-cells = <1>; 8462306a36Sopenharmony_ci #interrupt-cells = <1>; 8562306a36Sopenharmony_ci interrupt-controller; 8662306a36Sopenharmony_ci pinctrl-single,register-width = <16>; 8762306a36Sopenharmony_ci pinctrl-single,function-mask = <0xff1f>; 8862306a36Sopenharmony_ci }; 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci isp: isp@480bc000 { 9162306a36Sopenharmony_ci compatible = "ti,omap3-isp"; 9262306a36Sopenharmony_ci reg = <0x480bc000 0x12fc 9362306a36Sopenharmony_ci 0x480bd800 0x017c>; 9462306a36Sopenharmony_ci interrupts = <24>; 9562306a36Sopenharmony_ci iommus = <&mmu_isp>; 9662306a36Sopenharmony_ci syscon = <&scm_conf 0x6c>; 9762306a36Sopenharmony_ci ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>; 9862306a36Sopenharmony_ci #clock-cells = <1>; 9962306a36Sopenharmony_ci ports { 10062306a36Sopenharmony_ci #address-cells = <1>; 10162306a36Sopenharmony_ci #size-cells = <0>; 10262306a36Sopenharmony_ci }; 10362306a36Sopenharmony_ci }; 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ci bandgap: bandgap@48002524 { 10662306a36Sopenharmony_ci reg = <0x48002524 0x4>; 10762306a36Sopenharmony_ci compatible = "ti,omap34xx-bandgap"; 10862306a36Sopenharmony_ci #thermal-sensor-cells = <0>; 10962306a36Sopenharmony_ci }; 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci target-module@480cb000 { 11262306a36Sopenharmony_ci compatible = "ti,sysc-omap3430-sr", "ti,sysc"; 11362306a36Sopenharmony_ci ti,hwmods = "smartreflex_core"; 11462306a36Sopenharmony_ci reg = <0x480cb024 0x4>; 11562306a36Sopenharmony_ci reg-names = "sysc"; 11662306a36Sopenharmony_ci ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>; 11762306a36Sopenharmony_ci clocks = <&sr2_fck>; 11862306a36Sopenharmony_ci clock-names = "fck"; 11962306a36Sopenharmony_ci #address-cells = <1>; 12062306a36Sopenharmony_ci #size-cells = <1>; 12162306a36Sopenharmony_ci ranges = <0 0x480cb000 0x001000>; 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_ci smartreflex_core: smartreflex@0 { 12462306a36Sopenharmony_ci compatible = "ti,omap3-smartreflex-core"; 12562306a36Sopenharmony_ci reg = <0 0x400>; 12662306a36Sopenharmony_ci interrupts = <19>; 12762306a36Sopenharmony_ci }; 12862306a36Sopenharmony_ci }; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci target-module@480c9000 { 13162306a36Sopenharmony_ci compatible = "ti,sysc-omap3430-sr", "ti,sysc"; 13262306a36Sopenharmony_ci ti,hwmods = "smartreflex_mpu_iva"; 13362306a36Sopenharmony_ci reg = <0x480c9024 0x4>; 13462306a36Sopenharmony_ci reg-names = "sysc"; 13562306a36Sopenharmony_ci ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>; 13662306a36Sopenharmony_ci clocks = <&sr1_fck>; 13762306a36Sopenharmony_ci clock-names = "fck"; 13862306a36Sopenharmony_ci #address-cells = <1>; 13962306a36Sopenharmony_ci #size-cells = <1>; 14062306a36Sopenharmony_ci ranges = <0 0x480c9000 0x001000>; 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ci smartreflex_mpu_iva: smartreflex@480c9000 { 14362306a36Sopenharmony_ci compatible = "ti,omap3-smartreflex-mpu-iva"; 14462306a36Sopenharmony_ci reg = <0 0x400>; 14562306a36Sopenharmony_ci interrupts = <18>; 14662306a36Sopenharmony_ci }; 14762306a36Sopenharmony_ci }; 14862306a36Sopenharmony_ci 14962306a36Sopenharmony_ci /* 15062306a36Sopenharmony_ci * On omap34xx the OCP registers do not seem to be accessible 15162306a36Sopenharmony_ci * at all unlike on 36xx. Maybe SGX is permanently set to 15262306a36Sopenharmony_ci * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is 15362306a36Sopenharmony_ci * write-only at 0x50000e10. We detect SGX based on the SGX 15462306a36Sopenharmony_ci * revision register instead of the unreadable OCP revision 15562306a36Sopenharmony_ci * register. Also note that on early 34xx es1 revision there 15662306a36Sopenharmony_ci * are also different clocks, but we do not have any dts users 15762306a36Sopenharmony_ci * for it. 15862306a36Sopenharmony_ci */ 15962306a36Sopenharmony_ci sgx_module: target-module@50000000 { 16062306a36Sopenharmony_ci compatible = "ti,sysc-omap2", "ti,sysc"; 16162306a36Sopenharmony_ci reg = <0x50000014 0x4>; 16262306a36Sopenharmony_ci reg-names = "rev"; 16362306a36Sopenharmony_ci clocks = <&sgx_fck>, <&sgx_ick>; 16462306a36Sopenharmony_ci clock-names = "fck", "ick"; 16562306a36Sopenharmony_ci #address-cells = <1>; 16662306a36Sopenharmony_ci #size-cells = <1>; 16762306a36Sopenharmony_ci ranges = <0 0x50000000 0x4000>; 16862306a36Sopenharmony_ci 16962306a36Sopenharmony_ci /* 17062306a36Sopenharmony_ci * Closed source PowerVR driver, no child device 17162306a36Sopenharmony_ci * binding or driver in mainline 17262306a36Sopenharmony_ci */ 17362306a36Sopenharmony_ci }; 17462306a36Sopenharmony_ci }; 17562306a36Sopenharmony_ci 17662306a36Sopenharmony_ci thermal_zones: thermal-zones { 17762306a36Sopenharmony_ci #include "omap3-cpu-thermal.dtsi" 17862306a36Sopenharmony_ci }; 17962306a36Sopenharmony_ci}; 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_ci&ssi { 18262306a36Sopenharmony_ci status = "okay"; 18362306a36Sopenharmony_ci 18462306a36Sopenharmony_ci clocks = <&ssi_ssr_fck>, 18562306a36Sopenharmony_ci <&ssi_sst_fck>, 18662306a36Sopenharmony_ci <&ssi_ick>; 18762306a36Sopenharmony_ci clock-names = "ssi_ssr_fck", 18862306a36Sopenharmony_ci "ssi_sst_fck", 18962306a36Sopenharmony_ci "ssi_ick"; 19062306a36Sopenharmony_ci}; 19162306a36Sopenharmony_ci 19262306a36Sopenharmony_ci&usb_otg_target { 19362306a36Sopenharmony_ci clocks = <&hsotgusb_ick_3430es2>; 19462306a36Sopenharmony_ci}; 19562306a36Sopenharmony_ci 19662306a36Sopenharmony_ci/include/ "omap34xx-omap36xx-clocks.dtsi" 19762306a36Sopenharmony_ci/include/ "omap36xx-omap3430es2plus-clocks.dtsi" 19862306a36Sopenharmony_ci/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" 199