162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci// Copyright (c) 2018 Texas Instruments
362306a36Sopenharmony_ci// MMC IOdelay values for TI's DRA76x and AM576x SoCs.
462306a36Sopenharmony_ci// Author: Sekhar Nori <nsekhar@ti.com>
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci/*
762306a36Sopenharmony_ci * Rules for modifying this file:
862306a36Sopenharmony_ci * a) Update of this file should typically correspond to a datamanual revision.
962306a36Sopenharmony_ci *    Datamanual revision that was used should be updated in comment below.
1062306a36Sopenharmony_ci *    If there is no update to datamanual, do not update the values. If you
1162306a36Sopenharmony_ci *    need to use values different from that recommended by the datamanual
1262306a36Sopenharmony_ci *    for your design, then you should consider adding values to the device-
1362306a36Sopenharmony_ci *    -tree file for your board directly.
1462306a36Sopenharmony_ci * b) We keep the mode names as close to the datamanual as possible. So
1562306a36Sopenharmony_ci *    if the manual calls a mode, DDR50, or DDR or DDR 1.8v or DDR 3.3v,
1662306a36Sopenharmony_ci *    we follow that in code too.
1762306a36Sopenharmony_ci * c) If the values change between multiple revisions of silicon, we add
1862306a36Sopenharmony_ci *    a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
1962306a36Sopenharmony_ci *    'rev20' for PG 2.0 and so on.
2062306a36Sopenharmony_ci * d) The node name and node label should be the exact same string. This is
2162306a36Sopenharmony_ci *    to curb naming creativity and achieve consistency.
2262306a36Sopenharmony_ci *
2362306a36Sopenharmony_ci * Datamanual Revisions:
2462306a36Sopenharmony_ci *
2562306a36Sopenharmony_ci * DRA76x Silicon Revision 1.0: SPRS993E, Revised December 2018
2662306a36Sopenharmony_ci *
2762306a36Sopenharmony_ci */
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci&dra7_pmx_core {
3062306a36Sopenharmony_ci	mmc1_pins_default: mmc1-default-pins {
3162306a36Sopenharmony_ci		pinctrl-single,pins = <
3262306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
3362306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
3462306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
3562306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
3662306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
3762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
3862306a36Sopenharmony_ci		>;
3962306a36Sopenharmony_ci	};
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci	mmc1_pins_hs: mmc1-hs-pins {
4262306a36Sopenharmony_ci		pinctrl-single,pins = <
4362306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
4462306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
4562306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
4662306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
4762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
4862306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
4962306a36Sopenharmony_ci		>;
5062306a36Sopenharmony_ci	};
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci	mmc1_pins_sdr50: mmc1-sdr50-pins {
5362306a36Sopenharmony_ci		pinctrl-single,pins = <
5462306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)	/* mmc1_clk.clk */
5562306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)	/* mmc1_cmd.cmd */
5662306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)	/* mmc1_dat0.dat0 */
5762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)	/* mmc1_dat1.dat1 */
5862306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)	/* mmc1_dat2.dat2 */
5962306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)	/* mmc1_dat3.dat3 */
6062306a36Sopenharmony_ci		>;
6162306a36Sopenharmony_ci	};
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci	mmc1_pins_ddr50: mmc1-ddr50-pins {
6462306a36Sopenharmony_ci		pinctrl-single,pins = <
6562306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)	/* mmc1_clk.clk */
6662306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)	/* mmc1_cmd.cmd */
6762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)	/* mmc1_dat0.dat0 */
6862306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)	/* mmc1_dat1.dat1 */
6962306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)	/* mmc1_dat2.dat2 */
7062306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)	/* mmc1_dat3.dat3 */
7162306a36Sopenharmony_ci		>;
7262306a36Sopenharmony_ci	};
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci	mmc2_pins_default: mmc2-default-pins {
7562306a36Sopenharmony_ci		pinctrl-single,pins = <
7662306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
7762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
7862306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
7962306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
8062306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
8162306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
8262306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
8362306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
8462306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
8562306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
8662306a36Sopenharmony_ci		>;
8762306a36Sopenharmony_ci	};
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci	mmc2_pins_hs200: mmc2-hs200-pins {
9062306a36Sopenharmony_ci		pinctrl-single,pins = <
9162306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
9262306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
9362306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
9462306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
9562306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
9662306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
9762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
9862306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
9962306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
10062306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
10162306a36Sopenharmony_ci		>;
10262306a36Sopenharmony_ci	};
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci	mmc3_pins_default: mmc3-default-pins {
10562306a36Sopenharmony_ci		pinctrl-single,pins = <
10662306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
10762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
10862306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
10962306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
11062306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
11162306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
11262306a36Sopenharmony_ci		>;
11362306a36Sopenharmony_ci	};
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci	mmc4_pins_hs: mmc4-hs-pins {
11662306a36Sopenharmony_ci		pinctrl-single,pins = <
11762306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
11862306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
11962306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
12062306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
12162306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
12262306a36Sopenharmony_ci			DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
12362306a36Sopenharmony_ci		>;
12462306a36Sopenharmony_ci	};
12562306a36Sopenharmony_ci};
12662306a36Sopenharmony_ci
12762306a36Sopenharmony_ci&dra7_iodelay_core {
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ci	/* Corresponds to MMC1_DDR_MANUAL1 in datamanual */
13062306a36Sopenharmony_ci	mmc1_iodelay_ddr_conf: mmc1_iodelay_ddr_conf {
13162306a36Sopenharmony_ci		pinctrl-pin-array = <
13262306a36Sopenharmony_ci			0x618 A_DELAY_PS(489) G_DELAY_PS(0)	/* CFG_MMC1_CLK_IN */
13362306a36Sopenharmony_ci			0x624 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_CMD_IN */
13462306a36Sopenharmony_ci			0x630 A_DELAY_PS(374) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_IN */
13562306a36Sopenharmony_ci			0x63c A_DELAY_PS(31) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_IN */
13662306a36Sopenharmony_ci			0x648 A_DELAY_PS(56) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_IN */
13762306a36Sopenharmony_ci			0x654 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_IN */
13862306a36Sopenharmony_ci			0x620 A_DELAY_PS(1355) G_DELAY_PS(0)	/* CFG_MMC1_CLK_OUT */
13962306a36Sopenharmony_ci			0x628 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OEN */
14062306a36Sopenharmony_ci			0x62c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OUT */
14162306a36Sopenharmony_ci			0x634 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_OEN */
14262306a36Sopenharmony_ci			0x638 A_DELAY_PS(0) G_DELAY_PS(4)	/* CFG_MMC1_DAT0_OUT */
14362306a36Sopenharmony_ci			0x640 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OEN */
14462306a36Sopenharmony_ci			0x644 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OUT */
14562306a36Sopenharmony_ci			0x64c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OEN */
14662306a36Sopenharmony_ci			0x650 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OUT */
14762306a36Sopenharmony_ci			0x658 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OEN */
14862306a36Sopenharmony_ci			0x65c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OUT */
14962306a36Sopenharmony_ci		>;
15062306a36Sopenharmony_ci	};
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci	/* Corresponds to MMC1_SDR104_MANUAL1 in datamanual */
15362306a36Sopenharmony_ci	mmc1_iodelay_sdr104_conf: mmc1_iodelay_sdr104_conf {
15462306a36Sopenharmony_ci		pinctrl-pin-array = <
15562306a36Sopenharmony_ci			0x620 A_DELAY_PS(892) G_DELAY_PS(0)	/* CFG_MMC1_CLK_OUT */
15662306a36Sopenharmony_ci			0x628 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OEN */
15762306a36Sopenharmony_ci			0x62c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OUT */
15862306a36Sopenharmony_ci			0x634 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_OEN */
15962306a36Sopenharmony_ci			0x638 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_OUT */
16062306a36Sopenharmony_ci			0x640 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OEN */
16162306a36Sopenharmony_ci			0x644 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OUT */
16262306a36Sopenharmony_ci			0x64c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OEN */
16362306a36Sopenharmony_ci			0x650 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OUT */
16462306a36Sopenharmony_ci			0x658 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OEN */
16562306a36Sopenharmony_ci			0x65c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OUT */
16662306a36Sopenharmony_ci		>;
16762306a36Sopenharmony_ci	};
16862306a36Sopenharmony_ci
16962306a36Sopenharmony_ci	/* Corresponds to MMC2_HS200_MANUAL1 in datamanual */
17062306a36Sopenharmony_ci	mmc2_iodelay_hs200_conf: mmc2_iodelay_hs200_conf {
17162306a36Sopenharmony_ci		pinctrl-pin-array = <
17262306a36Sopenharmony_ci			0x190 A_DELAY_PS(384) G_DELAY_PS(0)	/* CFG_GPMC_A19_OEN */
17362306a36Sopenharmony_ci			0x194 A_DELAY_PS(350) G_DELAY_PS(174)	/* CFG_GPMC_A19_OUT */
17462306a36Sopenharmony_ci			0x1a8 A_DELAY_PS(410) G_DELAY_PS(0)	/* CFG_GPMC_A20_OEN */
17562306a36Sopenharmony_ci			0x1ac A_DELAY_PS(335) G_DELAY_PS(0)	/* CFG_GPMC_A20_OUT */
17662306a36Sopenharmony_ci			0x1b4 A_DELAY_PS(468) G_DELAY_PS(0)	/* CFG_GPMC_A21_OEN */
17762306a36Sopenharmony_ci			0x1b8 A_DELAY_PS(339) G_DELAY_PS(0)	/* CFG_GPMC_A21_OUT */
17862306a36Sopenharmony_ci			0x1c0 A_DELAY_PS(676) G_DELAY_PS(0)	/* CFG_GPMC_A22_OEN */
17962306a36Sopenharmony_ci			0x1c4 A_DELAY_PS(219) G_DELAY_PS(0)	/* CFG_GPMC_A22_OUT */
18062306a36Sopenharmony_ci			0x1d0 A_DELAY_PS(1062) G_DELAY_PS(154)	/* CFG_GPMC_A23_OUT */
18162306a36Sopenharmony_ci			0x1d8 A_DELAY_PS(640) G_DELAY_PS(0)	/* CFG_GPMC_A24_OEN */
18262306a36Sopenharmony_ci			0x1dc A_DELAY_PS(150) G_DELAY_PS(0)	/* CFG_GPMC_A24_OUT */
18362306a36Sopenharmony_ci			0x1e4 A_DELAY_PS(356) G_DELAY_PS(0)	/* CFG_GPMC_A25_OEN */
18462306a36Sopenharmony_ci			0x1e8 A_DELAY_PS(150) G_DELAY_PS(0)	/* CFG_GPMC_A25_OUT */
18562306a36Sopenharmony_ci			0x1f0 A_DELAY_PS(579) G_DELAY_PS(0)	/* CFG_GPMC_A26_OEN */
18662306a36Sopenharmony_ci			0x1f4 A_DELAY_PS(200) G_DELAY_PS(0)	/* CFG_GPMC_A26_OUT */
18762306a36Sopenharmony_ci			0x1fc A_DELAY_PS(435) G_DELAY_PS(0)	/* CFG_GPMC_A27_OEN */
18862306a36Sopenharmony_ci			0x200 A_DELAY_PS(236) G_DELAY_PS(0)	/* CFG_GPMC_A27_OUT */
18962306a36Sopenharmony_ci			0x364 A_DELAY_PS(759) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OEN */
19062306a36Sopenharmony_ci			0x368 A_DELAY_PS(372) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OUT */
19162306a36Sopenharmony_ci	      >;
19262306a36Sopenharmony_ci	};
19362306a36Sopenharmony_ci
19462306a36Sopenharmony_ci	/* Corresponds to MMC3_MANUAL1 in datamanual */
19562306a36Sopenharmony_ci	mmc3_iodelay_manual1_conf: mmc3_iodelay_manual1_conf {
19662306a36Sopenharmony_ci		pinctrl-pin-array = <
19762306a36Sopenharmony_ci			0x678 A_DELAY_PS(0) G_DELAY_PS(386)	/* CFG_MMC3_CLK_IN */
19862306a36Sopenharmony_ci			0x680 A_DELAY_PS(605) G_DELAY_PS(0)	/* CFG_MMC3_CLK_OUT */
19962306a36Sopenharmony_ci			0x684 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_IN */
20062306a36Sopenharmony_ci			0x688 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OEN */
20162306a36Sopenharmony_ci			0x68c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OUT */
20262306a36Sopenharmony_ci			0x690 A_DELAY_PS(171) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_IN */
20362306a36Sopenharmony_ci			0x694 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OEN */
20462306a36Sopenharmony_ci			0x698 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OUT */
20562306a36Sopenharmony_ci			0x69c A_DELAY_PS(221) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_IN */
20662306a36Sopenharmony_ci			0x6a0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OEN */
20762306a36Sopenharmony_ci			0x6a4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OUT */
20862306a36Sopenharmony_ci			0x6a8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_IN */
20962306a36Sopenharmony_ci			0x6ac A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OEN */
21062306a36Sopenharmony_ci			0x6b0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OUT */
21162306a36Sopenharmony_ci			0x6b4 A_DELAY_PS(474) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_IN */
21262306a36Sopenharmony_ci			0x6b8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OEN */
21362306a36Sopenharmony_ci			0x6bc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OUT */
21462306a36Sopenharmony_ci		>;
21562306a36Sopenharmony_ci	};
21662306a36Sopenharmony_ci
21762306a36Sopenharmony_ci	/* Corresponds to MMC3_MANUAL2 in datamanual */
21862306a36Sopenharmony_ci	mmc3_iodelay_sdr50_conf: mmc3_iodelay_sdr50_conf {
21962306a36Sopenharmony_ci		pinctrl-pin-array = <
22062306a36Sopenharmony_ci			0x678 A_DELAY_PS(852) G_DELAY_PS(0)	/* CFG_MMC3_CLK_IN */
22162306a36Sopenharmony_ci			0x680 A_DELAY_PS(94) G_DELAY_PS(0)	/* CFG_MMC3_CLK_OUT */
22262306a36Sopenharmony_ci			0x684 A_DELAY_PS(122) G_DELAY_PS(0)	/* CFG_MMC3_CMD_IN */
22362306a36Sopenharmony_ci			0x688 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OEN */
22462306a36Sopenharmony_ci			0x68c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OUT */
22562306a36Sopenharmony_ci			0x690 A_DELAY_PS(91) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_IN */
22662306a36Sopenharmony_ci			0x694 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OEN */
22762306a36Sopenharmony_ci			0x698 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OUT */
22862306a36Sopenharmony_ci			0x69c A_DELAY_PS(57) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_IN */
22962306a36Sopenharmony_ci			0x6a0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OEN */
23062306a36Sopenharmony_ci			0x6a4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OUT */
23162306a36Sopenharmony_ci			0x6a8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_IN */
23262306a36Sopenharmony_ci			0x6ac A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OEN */
23362306a36Sopenharmony_ci			0x6b0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OUT */
23462306a36Sopenharmony_ci			0x6b4 A_DELAY_PS(375) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_IN */
23562306a36Sopenharmony_ci			0x6b8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OEN */
23662306a36Sopenharmony_ci			0x6bc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OUT */
23762306a36Sopenharmony_ci		>;
23862306a36Sopenharmony_ci	};
23962306a36Sopenharmony_ci
24062306a36Sopenharmony_ci	/* Corresponds to MMC4_MANUAL1 in datamanual */
24162306a36Sopenharmony_ci	mmc4_iodelay_manual1_conf: mmc4_iodelay_manual1_conf {
24262306a36Sopenharmony_ci		pinctrl-pin-array = <
24362306a36Sopenharmony_ci			0x840 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_IN */
24462306a36Sopenharmony_ci			0x848 A_DELAY_PS(1147) G_DELAY_PS(0)	/* CFG_UART1_CTSN_OUT */
24562306a36Sopenharmony_ci			0x84c A_DELAY_PS(1834) G_DELAY_PS(0)	/* CFG_UART1_RTSN_IN */
24662306a36Sopenharmony_ci			0x850 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OEN */
24762306a36Sopenharmony_ci			0x854 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OUT */
24862306a36Sopenharmony_ci			0x870 A_DELAY_PS(2165) G_DELAY_PS(0)	/* CFG_UART2_CTSN_IN */
24962306a36Sopenharmony_ci			0x874 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OEN */
25062306a36Sopenharmony_ci			0x878 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OUT */
25162306a36Sopenharmony_ci			0x87c A_DELAY_PS(1929) G_DELAY_PS(64)	/* CFG_UART2_RTSN_IN */
25262306a36Sopenharmony_ci			0x880 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OEN */
25362306a36Sopenharmony_ci			0x884 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OUT */
25462306a36Sopenharmony_ci			0x888 A_DELAY_PS(1935) G_DELAY_PS(128)	/* CFG_UART2_RXD_IN */
25562306a36Sopenharmony_ci			0x88c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OEN */
25662306a36Sopenharmony_ci			0x890 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OUT */
25762306a36Sopenharmony_ci			0x894 A_DELAY_PS(2172) G_DELAY_PS(44)	/* CFG_UART2_TXD_IN */
25862306a36Sopenharmony_ci			0x898 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OEN */
25962306a36Sopenharmony_ci			0x89c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OUT */
26062306a36Sopenharmony_ci		>;
26162306a36Sopenharmony_ci	};
26262306a36Sopenharmony_ci
26362306a36Sopenharmony_ci	/* Corresponds to MMC4_DS_MANUAL1 in datamanual */
26462306a36Sopenharmony_ci	mmc4_iodelay_default_conf: mmc4_iodelay_default_conf {
26562306a36Sopenharmony_ci		pinctrl-pin-array = <
26662306a36Sopenharmony_ci			0x840 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_IN */
26762306a36Sopenharmony_ci			0x848 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_OUT */
26862306a36Sopenharmony_ci			0x84c A_DELAY_PS(307) G_DELAY_PS(0)	/* CFG_UART1_RTSN_IN */
26962306a36Sopenharmony_ci			0x850 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OEN */
27062306a36Sopenharmony_ci			0x854 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OUT */
27162306a36Sopenharmony_ci			0x870 A_DELAY_PS(785) G_DELAY_PS(0)	/* CFG_UART2_CTSN_IN */
27262306a36Sopenharmony_ci			0x874 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OEN */
27362306a36Sopenharmony_ci			0x878 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OUT */
27462306a36Sopenharmony_ci			0x87c A_DELAY_PS(613) G_DELAY_PS(0)	/* CFG_UART2_RTSN_IN */
27562306a36Sopenharmony_ci			0x880 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OEN */
27662306a36Sopenharmony_ci			0x884 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OUT */
27762306a36Sopenharmony_ci			0x888 A_DELAY_PS(683) G_DELAY_PS(0)	/* CFG_UART2_RXD_IN */
27862306a36Sopenharmony_ci			0x88c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OEN */
27962306a36Sopenharmony_ci			0x890 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OUT */
28062306a36Sopenharmony_ci			0x894 A_DELAY_PS(835) G_DELAY_PS(0)	/* CFG_UART2_TXD_IN */
28162306a36Sopenharmony_ci			0x898 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OEN */
28262306a36Sopenharmony_ci			0x89c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OUT */
28362306a36Sopenharmony_ci		>;
28462306a36Sopenharmony_ci	};
28562306a36Sopenharmony_ci};
286