162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device tree for Winterland IceBoard
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * https://mcgillcosmology.com
662306a36Sopenharmony_ci * https://threespeedlogic.com
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * This is an ARM + FPGA instrumentation board used at telescopes in
962306a36Sopenharmony_ci * Antarctica (the South Pole Telescope), Chile (POLARBEAR), and at the DRAO
1062306a36Sopenharmony_ci * observatory in British Columbia (CHIME).
1162306a36Sopenharmony_ci *
1262306a36Sopenharmony_ci * Copyright (c) 2019 Three-Speed Logic, Inc. <gsmecher@threespeedlogic.com>
1362306a36Sopenharmony_ci */
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/dts-v1/;
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci#include "dm814x.dtsi"
1862306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/irq.h>
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci/ {
2162306a36Sopenharmony_ci	model = "Winterland IceBoard";
2262306a36Sopenharmony_ci	compatible = "ti,dm8148", "ti,dm814";
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci	chosen {
2562306a36Sopenharmony_ci		stdout-path = "serial1:115200n8";
2662306a36Sopenharmony_ci		bootargs = "earlycon";
2762306a36Sopenharmony_ci	};
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci	memory@80000000 {
3062306a36Sopenharmony_ci		device_type = "memory";
3162306a36Sopenharmony_ci		reg = <0x80000000 0x40000000>;	/* 1 GB */
3262306a36Sopenharmony_ci	};
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci	vmmcsd_fixed: fixedregulator0 {
3562306a36Sopenharmony_ci		compatible = "regulator-fixed";
3662306a36Sopenharmony_ci		regulator-name = "vmmcsd_fixed";
3762306a36Sopenharmony_ci		regulator-min-microvolt = <3300000>;
3862306a36Sopenharmony_ci		regulator-max-microvolt = <3300000>;
3962306a36Sopenharmony_ci		regulator-always-on;
4062306a36Sopenharmony_ci	};
4162306a36Sopenharmony_ci};
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci/* The MAC provides internal delay for the transmit path ONLY, which is enabled
4462306a36Sopenharmony_ci * provided no -id/-txid/-rxid suffix is provided to "phy-mode".
4562306a36Sopenharmony_ci *
4662306a36Sopenharmony_ci * The receive path is delayed at the PHY. The recommended register settings
4762306a36Sopenharmony_ci * are 0xf0 for the control bits, and 0x7777 for the data bits. However, the
4862306a36Sopenharmony_ci * conversion code in the kernel lies: the PHY's registers are 120 ps per tap,
4962306a36Sopenharmony_ci * and the kernel assumes 200 ps per tap. So we have fudged the numbers here to
5062306a36Sopenharmony_ci * obtain the correct register settings.
5162306a36Sopenharmony_ci */
5262306a36Sopenharmony_ci&mac { dual_emac = <1>; };
5362306a36Sopenharmony_ci&cpsw_emac0 {
5462306a36Sopenharmony_ci	phy-handle = <&ethphy0>;
5562306a36Sopenharmony_ci	phy-mode = "rgmii";
5662306a36Sopenharmony_ci	dual_emac_res_vlan = <1>;
5762306a36Sopenharmony_ci};
5862306a36Sopenharmony_ci&cpsw_emac1 {
5962306a36Sopenharmony_ci	phy-handle = <&ethphy1>;
6062306a36Sopenharmony_ci	phy-mode = "rgmii";
6162306a36Sopenharmony_ci	dual_emac_res_vlan = <2>;
6262306a36Sopenharmony_ci};
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci&davinci_mdio {
6562306a36Sopenharmony_ci	ethphy0: ethernet-phy@0 {
6662306a36Sopenharmony_ci		reg = <0x2>;
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci		rxc-skew-ps = <3000>;
6962306a36Sopenharmony_ci		rxdv-skew-ps = <0>;
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci		rxd3-skew-ps = <0>;
7262306a36Sopenharmony_ci		rxd2-skew-ps = <0>;
7362306a36Sopenharmony_ci		rxd1-skew-ps = <0>;
7462306a36Sopenharmony_ci		rxd0-skew-ps = <0>;
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci		phy-reset-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
7762306a36Sopenharmony_ci	};
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci	ethphy1: ethernet-phy@1 {
8062306a36Sopenharmony_ci		reg = <0x1>;
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ci		rxc-skew-ps = <3000>;
8362306a36Sopenharmony_ci		rxdv-skew-ps = <0>;
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci		rxd3-skew-ps = <0>;
8662306a36Sopenharmony_ci		rxd2-skew-ps = <0>;
8762306a36Sopenharmony_ci		rxd1-skew-ps = <0>;
8862306a36Sopenharmony_ci		rxd0-skew-ps = <0>;
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci		phy-reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
9162306a36Sopenharmony_ci	};
9262306a36Sopenharmony_ci};
9362306a36Sopenharmony_ci
9462306a36Sopenharmony_ci&mmc1 { status = "disabled"; };
9562306a36Sopenharmony_ci&mmc2 {
9662306a36Sopenharmony_ci	pinctrl-names = "default";
9762306a36Sopenharmony_ci	pinctrl-0 = <&mmc2_pins>;
9862306a36Sopenharmony_ci	vmmc-supply = <&vmmcsd_fixed>;
9962306a36Sopenharmony_ci	bus-width = <4>;
10062306a36Sopenharmony_ci};
10162306a36Sopenharmony_ci&mmc3 { status = "disabled"; };
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ci&i2c1 {
10462306a36Sopenharmony_ci	/* Most I2C activity happens through this port, with the sole exception
10562306a36Sopenharmony_ci	 * of the backplane. Since there are multiply assigned addresses, the
10662306a36Sopenharmony_ci	 * "i2c-mux-idle-disconnect" is important.
10762306a36Sopenharmony_ci	 */
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci	i2c-mux@70 {
11062306a36Sopenharmony_ci		compatible = "nxp,pca9548";
11162306a36Sopenharmony_ci		reg = <0x70>;
11262306a36Sopenharmony_ci		#address-cells = <1>;
11362306a36Sopenharmony_ci		#size-cells = <0>;
11462306a36Sopenharmony_ci		i2c-mux-idle-disconnect;
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_ci		i2c@0 {
11762306a36Sopenharmony_ci			/* FMC A */
11862306a36Sopenharmony_ci			#address-cells = <1>;
11962306a36Sopenharmony_ci			#size-cells = <0>;
12062306a36Sopenharmony_ci			reg = <0>;
12162306a36Sopenharmony_ci		};
12262306a36Sopenharmony_ci
12362306a36Sopenharmony_ci		i2c@1 {
12462306a36Sopenharmony_ci			/* FMC B */
12562306a36Sopenharmony_ci			#address-cells = <1>;
12662306a36Sopenharmony_ci			#size-cells = <0>;
12762306a36Sopenharmony_ci			reg = <1>;
12862306a36Sopenharmony_ci		};
12962306a36Sopenharmony_ci
13062306a36Sopenharmony_ci		i2c@2 {
13162306a36Sopenharmony_ci			/* QSFP A */
13262306a36Sopenharmony_ci			#address-cells = <1>;
13362306a36Sopenharmony_ci			#size-cells = <0>;
13462306a36Sopenharmony_ci			reg = <2>;
13562306a36Sopenharmony_ci		};
13662306a36Sopenharmony_ci
13762306a36Sopenharmony_ci		i2c@3 {
13862306a36Sopenharmony_ci			/* QSFP B */
13962306a36Sopenharmony_ci			#address-cells = <1>;
14062306a36Sopenharmony_ci			#size-cells = <0>;
14162306a36Sopenharmony_ci			reg = <3>;
14262306a36Sopenharmony_ci		};
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci		i2c@4 {
14562306a36Sopenharmony_ci			/* SFP */
14662306a36Sopenharmony_ci			#address-cells = <1>;
14762306a36Sopenharmony_ci			#size-cells = <0>;
14862306a36Sopenharmony_ci			reg = <4>;
14962306a36Sopenharmony_ci		};
15062306a36Sopenharmony_ci
15162306a36Sopenharmony_ci		i2c@5 {
15262306a36Sopenharmony_ci			#address-cells = <1>;
15362306a36Sopenharmony_ci			#size-cells = <0>;
15462306a36Sopenharmony_ci			reg = <5>;
15562306a36Sopenharmony_ci
15662306a36Sopenharmony_ci			ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <5000>; };
15762306a36Sopenharmony_ci			ina230@41 { compatible = "ti,ina230"; reg = <0x41>; shunt-resistor = <5000>; };
15862306a36Sopenharmony_ci			ina230@42 { compatible = "ti,ina230"; reg = <0x42>; shunt-resistor = <5000>; };
15962306a36Sopenharmony_ci
16062306a36Sopenharmony_ci			ina230@44 { compatible = "ti,ina230"; reg = <0x44>; shunt-resistor = <5000>; };
16162306a36Sopenharmony_ci			ina230@45 { compatible = "ti,ina230"; reg = <0x45>; shunt-resistor = <5000>; };
16262306a36Sopenharmony_ci			ina230@46 { compatible = "ti,ina230"; reg = <0x46>; shunt-resistor = <5000>; };
16362306a36Sopenharmony_ci
16462306a36Sopenharmony_ci			ina230@47 { compatible = "ti,ina230"; reg = <0x47>; shunt-resistor = <5500>; };
16562306a36Sopenharmony_ci			ina230@48 { compatible = "ti,ina230"; reg = <0x48>; shunt-resistor = <2360>; };
16662306a36Sopenharmony_ci			ina230@49 { compatible = "ti,ina230"; reg = <0x49>; shunt-resistor = <2360>; };
16762306a36Sopenharmony_ci			ina230@43 { compatible = "ti,ina230"; reg = <0x43>; shunt-resistor = <2360>; };
16862306a36Sopenharmony_ci			ina230@4b { compatible = "ti,ina230"; reg = <0x4b>; shunt-resistor = <5500>; };
16962306a36Sopenharmony_ci			ina230@4c { compatible = "ti,ina230"; reg = <0x4c>; shunt-resistor = <2360>; };
17062306a36Sopenharmony_ci			ina230@4d { compatible = "ti,ina230"; reg = <0x4d>; shunt-resistor = <770>; };
17162306a36Sopenharmony_ci			ina230@4e { compatible = "ti,ina230"; reg = <0x4e>; shunt-resistor = <770>; };
17262306a36Sopenharmony_ci			ina230@4f { compatible = "ti,ina230"; reg = <0x4f>; shunt-resistor = <770>; };
17362306a36Sopenharmony_ci		};
17462306a36Sopenharmony_ci
17562306a36Sopenharmony_ci		i2c@6 {
17662306a36Sopenharmony_ci			/* Backplane */
17762306a36Sopenharmony_ci			#address-cells = <1>;
17862306a36Sopenharmony_ci			#size-cells = <0>;
17962306a36Sopenharmony_ci			reg = <6>;
18062306a36Sopenharmony_ci		};
18162306a36Sopenharmony_ci
18262306a36Sopenharmony_ci		i2c@7 {
18362306a36Sopenharmony_ci			#address-cells = <1>;
18462306a36Sopenharmony_ci			#size-cells = <0>;
18562306a36Sopenharmony_ci			reg = <7>;
18662306a36Sopenharmony_ci
18762306a36Sopenharmony_ci			u41: pca9575@20 {
18862306a36Sopenharmony_ci				compatible = "nxp,pca9575";
18962306a36Sopenharmony_ci				reg = <0x20>;
19062306a36Sopenharmony_ci				gpio-controller;
19162306a36Sopenharmony_ci				#gpio-cells = <2>;
19262306a36Sopenharmony_ci
19362306a36Sopenharmony_ci				gpio-line-names =
19462306a36Sopenharmony_ci					"FMCA_EN_12V0", "FMCA_EN_3V3", "FMCA_EN_VADJ", "FMCA_PG_M2C",
19562306a36Sopenharmony_ci					"FMCA_PG_C2M", "FMCA_PRSNT_M2C_L", "FMCA_CLK_DIR", "SFP_LOS",
19662306a36Sopenharmony_ci					"FMCB_EN_12V0", "FMCB_EN_3V3", "FMCB_EN_VADJ", "FMCB_PG_M2C",
19762306a36Sopenharmony_ci					"FMCB_PG_C2M", "FMCB_PRSNT_M2C_L", "FMCB_CLK_DIR", "SFP_ModPrsL";
19862306a36Sopenharmony_ci				reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
19962306a36Sopenharmony_ci			};
20062306a36Sopenharmony_ci
20162306a36Sopenharmony_ci			u42: pca9575@21 {
20262306a36Sopenharmony_ci				compatible = "nxp,pca9575";
20362306a36Sopenharmony_ci				reg = <0x21>;
20462306a36Sopenharmony_ci				gpio-controller;
20562306a36Sopenharmony_ci				#gpio-cells = <2>;
20662306a36Sopenharmony_ci				gpio-line-names =
20762306a36Sopenharmony_ci					"QSFPA_ModPrsL", "QSFPA_IntL", "QSFPA_ResetL", "QSFPA_ModSelL",
20862306a36Sopenharmony_ci					"QSFPA_LPMode", "QSFPB_ModPrsL", "QSFPB_IntL", "QSFPB_ResetL",
20962306a36Sopenharmony_ci					"SFP_TxFault", "SFP_TxDisable", "SFP_RS0", "SFP_RS1",
21062306a36Sopenharmony_ci					"QSFPB_ModSelL", "QSFPB_LPMode", "SEL_SFP", "ARM_MR";
21162306a36Sopenharmony_ci				reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
21262306a36Sopenharmony_ci			};
21362306a36Sopenharmony_ci
21462306a36Sopenharmony_ci			u48: pca9575@22 {
21562306a36Sopenharmony_ci				compatible = "nxp,pca9575";
21662306a36Sopenharmony_ci				reg = <0x22>;
21762306a36Sopenharmony_ci				gpio-controller;
21862306a36Sopenharmony_ci				#gpio-cells = <2>;
21962306a36Sopenharmony_ci
22062306a36Sopenharmony_ci				sw-gpios = <&u48 0 0>, <&u48 1 0>, <&u48 2 0>, <&u48 3 0>,
22162306a36Sopenharmony_ci					<&u48 4 0>, <&u48 5 0>, <&u48 6 0>, <&u48 7 0>;
22262306a36Sopenharmony_ci				led-gpios = <&u48 7 0>, <&u48 6 0>, <&u48 5 0>, <&u48 4 0>,
22362306a36Sopenharmony_ci					<&u48 3 0>, <&u48 2 0>, <&u48 1 0>, <&u48 0 0>;
22462306a36Sopenharmony_ci
22562306a36Sopenharmony_ci				gpio-line-names =
22662306a36Sopenharmony_ci					"GP_SW1", "GP_SW2", "GP_SW3", "GP_SW4",
22762306a36Sopenharmony_ci					"GP_SW5", "GP_SW6", "GP_SW7", "GP_SW8",
22862306a36Sopenharmony_ci					"GP_LED8", "GP_LED7", "GP_LED6", "GP_LED5",
22962306a36Sopenharmony_ci					"GP_LED4", "GP_LED3", "GP_LED2", "GP_LED1";
23062306a36Sopenharmony_ci				reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
23162306a36Sopenharmony_ci			};
23262306a36Sopenharmony_ci
23362306a36Sopenharmony_ci			u59: pca9575@23 {
23462306a36Sopenharmony_ci				compatible = "nxp,pca9575";
23562306a36Sopenharmony_ci				reg = <0x23>;
23662306a36Sopenharmony_ci				gpio-controller;
23762306a36Sopenharmony_ci				#gpio-cells = <2>;
23862306a36Sopenharmony_ci				gpio-line-names =
23962306a36Sopenharmony_ci					"GP_LED9", "GP_LED10", "GP_LED11", "GP_LED12",
24062306a36Sopenharmony_ci					"GTX1V8PowerFault", "PHYAPowerFault", "PHYBPowerFault", "ArmPowerFault",
24162306a36Sopenharmony_ci					"BP_SLOW_GPIO0", "BP_SLOW_GPIO1", "BP_SLOW_GPIO2", "BP_SLOW_GPIO3",
24262306a36Sopenharmony_ci					"BP_SLOW_GPIO4", "BP_SLOW_GPIO5", "__unused_u59_p16", "__unused_u59_p17";
24362306a36Sopenharmony_ci				reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
24462306a36Sopenharmony_ci			};
24562306a36Sopenharmony_ci
24662306a36Sopenharmony_ci			tmp100@48 { compatible = "ti,tmp100"; reg = <0x48>; };
24762306a36Sopenharmony_ci			tmp100@4a { compatible = "ti,tmp100"; reg = <0x4a>; };
24862306a36Sopenharmony_ci			tmp100@4b { compatible = "ti,tmp100"; reg = <0x4b>; };
24962306a36Sopenharmony_ci			tmp100@4c { compatible = "ti,tmp100"; reg = <0x4c>; };
25062306a36Sopenharmony_ci
25162306a36Sopenharmony_ci			/* EEPROM bank and serial number are treated as separate devices */
25262306a36Sopenharmony_ci			at24c01@57 { compatible = "atmel,24c01"; reg = <0x57>; };
25362306a36Sopenharmony_ci			at24cs01@5f { compatible = "atmel,24cs01"; reg = <0x5f>; };
25462306a36Sopenharmony_ci		};
25562306a36Sopenharmony_ci	};
25662306a36Sopenharmony_ci};
25762306a36Sopenharmony_ci
25862306a36Sopenharmony_ci&i2c2 {
25962306a36Sopenharmony_ci	i2c-mux@71 {
26062306a36Sopenharmony_ci		compatible = "nxp,pca9548";
26162306a36Sopenharmony_ci		reg = <0x71>;
26262306a36Sopenharmony_ci		#address-cells = <1>;
26362306a36Sopenharmony_ci		#size-cells = <0>;
26462306a36Sopenharmony_ci
26562306a36Sopenharmony_ci		i2c@6 {
26662306a36Sopenharmony_ci			/* Backplane */
26762306a36Sopenharmony_ci			#address-cells = <1>;
26862306a36Sopenharmony_ci			#size-cells = <0>;
26962306a36Sopenharmony_ci			reg = <6>;
27062306a36Sopenharmony_ci			multi-master;
27162306a36Sopenharmony_ci
27262306a36Sopenharmony_ci			/* All backplanes should have this -- it's how we know they're there. */
27362306a36Sopenharmony_ci			at24c08@54 { compatible="atmel,24c08"; reg=<0x54>; };
27462306a36Sopenharmony_ci			at24cs08@5c { compatible="atmel,24cs08"; reg=<0x5c>; };
27562306a36Sopenharmony_ci
27662306a36Sopenharmony_ci			/* 16 slot backplane */
27762306a36Sopenharmony_ci			tmp421@4d { compatible="ti,tmp421"; reg=<0x4d>; };
27862306a36Sopenharmony_ci			tmp421@4e { compatible="ti,tmp421"; reg=<0x4e>; };
27962306a36Sopenharmony_ci			ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <2360>; };
28062306a36Sopenharmony_ci			amc6821@18 { compatible = "ti,amc6821"; reg = <0x18>; };
28162306a36Sopenharmony_ci
28262306a36Sopenharmony_ci			/* Single slot backplane */
28362306a36Sopenharmony_ci		};
28462306a36Sopenharmony_ci	};
28562306a36Sopenharmony_ci};
28662306a36Sopenharmony_ci
28762306a36Sopenharmony_ci&pincntl {
28862306a36Sopenharmony_ci	mmc2_pins: mmc2-pins {
28962306a36Sopenharmony_ci		pinctrl-single,pins = <
29062306a36Sopenharmony_ci			DM814X_IOPAD(0x0800, PIN_INPUT | 0x1)	/* SD1_CLK */
29162306a36Sopenharmony_ci			DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP | 0x1)	/* SD1_CMD */
29262306a36Sopenharmony_ci			DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP | 0x1)	/* SD1_DAT[0] */
29362306a36Sopenharmony_ci			DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP | 0x1)	/* SD1_DAT[1] */
29462306a36Sopenharmony_ci			DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP | 0x1)	/* SD1_DAT[2] */
29562306a36Sopenharmony_ci			DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP | 0x1)	/* SD1_DAT[3] */
29662306a36Sopenharmony_ci			DM814X_IOPAD(0x0924, PIN_INPUT_PULLUP | 0x40)	/* SD1_POW */
29762306a36Sopenharmony_ci			DM814X_IOPAD(0x0928, PIN_INPUT | 0x40)	/* SD1_SDWP */
29862306a36Sopenharmony_ci			DM814X_IOPAD(0x093C, PIN_INPUT | 0x2)	/* SD1_SDCD */
29962306a36Sopenharmony_ci			>;
30062306a36Sopenharmony_ci	};
30162306a36Sopenharmony_ci
30262306a36Sopenharmony_ci	usb0_pins: usb0-pins {
30362306a36Sopenharmony_ci		pinctrl-single,pins = <
30462306a36Sopenharmony_ci			DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1)	/* USB0_DRVVBUS */
30562306a36Sopenharmony_ci			>;
30662306a36Sopenharmony_ci	};
30762306a36Sopenharmony_ci
30862306a36Sopenharmony_ci	usb1_pins: usb1-pins {
30962306a36Sopenharmony_ci		pinctrl-single,pins = <
31062306a36Sopenharmony_ci			DM814X_IOPAD(0x0834, PIN_OUTPUT | 0x80)	/* USB1_DRVVBUS */
31162306a36Sopenharmony_ci			>;
31262306a36Sopenharmony_ci	};
31362306a36Sopenharmony_ci
31462306a36Sopenharmony_ci	gpio1_pins: gpio1-pins {
31562306a36Sopenharmony_ci		pinctrl-single,pins = <
31662306a36Sopenharmony_ci			DM814X_IOPAD(0x081c, PIN_OUTPUT | 0x80)	/* PROGRAM_B */
31762306a36Sopenharmony_ci			DM814X_IOPAD(0x0820, PIN_INPUT | 0x80)	/* INIT_B */
31862306a36Sopenharmony_ci			DM814X_IOPAD(0x0824, PIN_INPUT | 0x80)	/* DONE */
31962306a36Sopenharmony_ci
32062306a36Sopenharmony_ci			DM814X_IOPAD(0x0838, PIN_INPUT_PULLUP | 0x80) /* FMCA_TMS */
32162306a36Sopenharmony_ci			DM814X_IOPAD(0x083c, PIN_INPUT_PULLUP | 0x80) /* FMCA_TCK */
32262306a36Sopenharmony_ci			DM814X_IOPAD(0x0898, PIN_INPUT_PULLUP | 0x80) /* FMCA_TDO */
32362306a36Sopenharmony_ci			DM814X_IOPAD(0x089c, PIN_INPUT_PULLUP | 0x80) /* FMCA_TDI */
32462306a36Sopenharmony_ci			DM814X_IOPAD(0x08ac, PIN_INPUT_PULLUP | 0x80) /* FMCA_TRST */
32562306a36Sopenharmony_ci
32662306a36Sopenharmony_ci			DM814X_IOPAD(0x08b0, PIN_INPUT_PULLUP | 0x80) /* FMCB_TMS */
32762306a36Sopenharmony_ci			DM814X_IOPAD(0x0a88, PIN_INPUT_PULLUP | 0x80) /* FMCB_TCK */
32862306a36Sopenharmony_ci			DM814X_IOPAD(0x0a8c, PIN_INPUT_PULLUP | 0x80) /* FMCB_TDO */
32962306a36Sopenharmony_ci			DM814X_IOPAD(0x08bc, PIN_INPUT_PULLUP | 0x80) /* FMCB_TDI */
33062306a36Sopenharmony_ci			DM814X_IOPAD(0x0a94, PIN_INPUT_PULLUP | 0x80) /* FMCB_TRST */
33162306a36Sopenharmony_ci
33262306a36Sopenharmony_ci			DM814X_IOPAD(0x08d4, PIN_INPUT_PULLUP | 0x80) /* FPGA_TMS */
33362306a36Sopenharmony_ci			DM814X_IOPAD(0x0aa8, PIN_INPUT_PULLUP | 0x80) /* FPGA_TCK */
33462306a36Sopenharmony_ci			DM814X_IOPAD(0x0adc, PIN_INPUT_PULLUP | 0x80) /* FPGA_TDO */
33562306a36Sopenharmony_ci			DM814X_IOPAD(0x0ab0, PIN_INPUT_PULLUP | 0x80) /* FPGA_TDI */
33662306a36Sopenharmony_ci			>;
33762306a36Sopenharmony_ci	};
33862306a36Sopenharmony_ci
33962306a36Sopenharmony_ci	gpio2_pins: gpio2-pins {
34062306a36Sopenharmony_ci		pinctrl-single,pins = <
34162306a36Sopenharmony_ci			DM814X_IOPAD(0x090c, PIN_INPUT_PULLUP | 0x80) /* PHY A IRQ */
34262306a36Sopenharmony_ci			DM814X_IOPAD(0x0910, PIN_INPUT_PULLUP | 0x80) /* PHY A RESET */
34362306a36Sopenharmony_ci			DM814X_IOPAD(0x08f4, PIN_INPUT_PULLUP | 0x80) /* PHY B IRQ */
34462306a36Sopenharmony_ci			DM814X_IOPAD(0x08f8, PIN_INPUT_PULLUP | 0x80) /* PHY B RESET */
34562306a36Sopenharmony_ci
34662306a36Sopenharmony_ci			//DM814X_IOPAD(0x0a14, PIN_INPUT_PULLUP | 0x80) /* ARM IRQ */
34762306a36Sopenharmony_ci			//DM814X_IOPAD(0x0900, PIN_INPUT | 0x80) /* GPIO IRQ */
34862306a36Sopenharmony_ci			DM814X_IOPAD(0x0a2c, PIN_INPUT_PULLUP | 0x80) /* GPIO RESET */
34962306a36Sopenharmony_ci		>;
35062306a36Sopenharmony_ci	};
35162306a36Sopenharmony_ci
35262306a36Sopenharmony_ci	gpio4_pins: gpio4-pins {
35362306a36Sopenharmony_ci		pinctrl-single,pins = <
35462306a36Sopenharmony_ci			/* The PLL doesn't react well to the SPI controller reset, so
35562306a36Sopenharmony_ci			 * we force the CS lines to pull up as GPIOs until we're ready.
35662306a36Sopenharmony_ci			 * See https://e2e.ti.com/support/processors/f/791/t/276011?Linux-support-for-AM3874-DM8148-in-Arago-linux-omap3
35762306a36Sopenharmony_ci			 */
35862306a36Sopenharmony_ci			DM814X_IOPAD(0x0b3c, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO0 */
35962306a36Sopenharmony_ci			DM814X_IOPAD(0x0b40, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO1 */
36062306a36Sopenharmony_ci			DM814X_IOPAD(0x0b44, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO2 */
36162306a36Sopenharmony_ci			DM814X_IOPAD(0x0b48, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO3 */
36262306a36Sopenharmony_ci			DM814X_IOPAD(0x0b4c, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO4 */
36362306a36Sopenharmony_ci			DM814X_IOPAD(0x0b50, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO5 */
36462306a36Sopenharmony_ci		>;
36562306a36Sopenharmony_ci	};
36662306a36Sopenharmony_ci
36762306a36Sopenharmony_ci	spi2_pins: spi2-pins {
36862306a36Sopenharmony_ci		pinctrl-single,pins = <
36962306a36Sopenharmony_ci			DM814X_IOPAD(0x0950, PIN_INPUT_PULLUP | 0x80) /* PLL SPI CS1 as GPIO */
37062306a36Sopenharmony_ci			DM814X_IOPAD(0x0818, PIN_INPUT_PULLUP | 0x80) /* PLL SPI CS2 as GPIO */
37162306a36Sopenharmony_ci		>;
37262306a36Sopenharmony_ci	};
37362306a36Sopenharmony_ci
37462306a36Sopenharmony_ci	spi4_pins: spi4-pins {
37562306a36Sopenharmony_ci		pinctrl-single,pins = <
37662306a36Sopenharmony_ci			DM814X_IOPAD(0x0a7c, 0x20)
37762306a36Sopenharmony_ci			DM814X_IOPAD(0x0b74, 0x20)
37862306a36Sopenharmony_ci			DM814X_IOPAD(0x0b78, PIN_OUTPUT | 0x20)
37962306a36Sopenharmony_ci			DM814X_IOPAD(0x0b7c, PIN_OUTPUT_PULLDOWN | 0x20)
38062306a36Sopenharmony_ci			DM814X_IOPAD(0x0b80, PIN_INPUT | 0x20)
38162306a36Sopenharmony_ci		>;
38262306a36Sopenharmony_ci	};
38362306a36Sopenharmony_ci};
38462306a36Sopenharmony_ci
38562306a36Sopenharmony_ci&gpio1 {
38662306a36Sopenharmony_ci	pinctrl-names = "default";
38762306a36Sopenharmony_ci	pinctrl-0 = <&gpio1_pins>;
38862306a36Sopenharmony_ci	gpio-line-names =
38962306a36Sopenharmony_ci		"", "PROGRAM_B", "INIT_B", "DONE",			/* 0-3 */
39062306a36Sopenharmony_ci		"", "", "", "",						/* 4-7 */
39162306a36Sopenharmony_ci		"FMCA_TMS", "FMCA_TCK", "FMCA_TDO", "FMCA_TDI",		/* 8-11 */
39262306a36Sopenharmony_ci		"", "", "", "FMCA_TRST",				/* 12-15 */
39362306a36Sopenharmony_ci		"FMCB_TMS", "FMCB_TCK", "FMCB_TDO", "FMCB_TDI",		/* 16-19 */
39462306a36Sopenharmony_ci		"FMCB_TRST", "", "", "",				/* 20-23 */
39562306a36Sopenharmony_ci		"FPGA_TMS", "FPGA_TCK", "FPGA_TDO", "FPGA_TDI",		/* 24-27 */
39662306a36Sopenharmony_ci		"", "", "", "";						/* 28-31 */
39762306a36Sopenharmony_ci};
39862306a36Sopenharmony_ci
39962306a36Sopenharmony_ci&gpio2 {
40062306a36Sopenharmony_ci	pinctrl-names = "default";
40162306a36Sopenharmony_ci	pinctrl-0 = <&gpio2_pins>;
40262306a36Sopenharmony_ci	gpio-line-names =
40362306a36Sopenharmony_ci		"PHYA_IRQ_N", "PHYA_RESET_N", "", "",			/* 0-3 */
40462306a36Sopenharmony_ci		"", "", "", "PHYB_IRQ_N",				/* 4-7 */
40562306a36Sopenharmony_ci		"PHYB_RESET_N", "ARM_IRQ", "GPIO_IRQ", "";		/* 8-11 */
40662306a36Sopenharmony_ci};
40762306a36Sopenharmony_ci
40862306a36Sopenharmony_ci&gpio3 {
40962306a36Sopenharmony_ci	pinctrl-names = "default";
41062306a36Sopenharmony_ci	/*pinctrl-0 = <&gpio3_pins>;*/
41162306a36Sopenharmony_ci	gpio-line-names =
41262306a36Sopenharmony_ci		"", "", "ARMClkSel0", "",				/* 0-3 */
41362306a36Sopenharmony_ci		"EnFPGARef", "", "", "ARMClkSel1";			/* 4-7 */
41462306a36Sopenharmony_ci};
41562306a36Sopenharmony_ci
41662306a36Sopenharmony_ci&gpio4 {
41762306a36Sopenharmony_ci	pinctrl-names = "default";
41862306a36Sopenharmony_ci	pinctrl-0 = <&gpio4_pins>;
41962306a36Sopenharmony_ci	gpio-line-names =
42062306a36Sopenharmony_ci		"BP_ARM_GPIO0", "BP_ARM_GPIO1", "BP_ARM_GPIO2", "BP_ARM_GPIO3",
42162306a36Sopenharmony_ci		"BP_ARM_GPIO4", "BP_ARM_GPIO5";
42262306a36Sopenharmony_ci};
42362306a36Sopenharmony_ci
42462306a36Sopenharmony_ci&usb0 {
42562306a36Sopenharmony_ci	pinctrl-names = "default";
42662306a36Sopenharmony_ci	pinctrl-0 = <&usb0_pins>;
42762306a36Sopenharmony_ci	dr_mode = "host";
42862306a36Sopenharmony_ci};
42962306a36Sopenharmony_ci
43062306a36Sopenharmony_ci&usb1 {
43162306a36Sopenharmony_ci	pinctrl-names = "default";
43262306a36Sopenharmony_ci	pinctrl-0 = <&usb1_pins>;
43362306a36Sopenharmony_ci	dr_mode = "host";
43462306a36Sopenharmony_ci};
43562306a36Sopenharmony_ci
43662306a36Sopenharmony_ci&mcspi1 {
43762306a36Sopenharmony_ci	flash@0 {
43862306a36Sopenharmony_ci		#address-cells = <1>;
43962306a36Sopenharmony_ci		#size-cells = <1>;
44062306a36Sopenharmony_ci		compatible = "jedec,spi-nor";
44162306a36Sopenharmony_ci		reg = <0>;
44262306a36Sopenharmony_ci		spi-max-frequency = <40000000>;
44362306a36Sopenharmony_ci
44462306a36Sopenharmony_ci		fsbl@0 {
44562306a36Sopenharmony_ci			/* 256 kB */
44662306a36Sopenharmony_ci			label = "U-Boot-min";
44762306a36Sopenharmony_ci			reg = <0 0x40000>;
44862306a36Sopenharmony_ci		};
44962306a36Sopenharmony_ci		ssbl@1 {
45062306a36Sopenharmony_ci			/* 512 kB */
45162306a36Sopenharmony_ci			label = "U-Boot";
45262306a36Sopenharmony_ci			reg = <0x40000 0x80000>;
45362306a36Sopenharmony_ci		};
45462306a36Sopenharmony_ci		bootenv@2 {
45562306a36Sopenharmony_ci			/* 256 kB */
45662306a36Sopenharmony_ci			label = "U-Boot Env";
45762306a36Sopenharmony_ci			reg = <0xc0000 0x40000>;
45862306a36Sopenharmony_ci		};
45962306a36Sopenharmony_ci		kernel@3 {
46062306a36Sopenharmony_ci			/* 4 MB */
46162306a36Sopenharmony_ci			label = "Kernel";
46262306a36Sopenharmony_ci			reg = <0x100000 0x400000>;
46362306a36Sopenharmony_ci		};
46462306a36Sopenharmony_ci		ipmi@4 {
46562306a36Sopenharmony_ci			label = "IPMI FRU";
46662306a36Sopenharmony_ci			reg = <0x500000 0x40000>;
46762306a36Sopenharmony_ci		};
46862306a36Sopenharmony_ci		fs@5 {
46962306a36Sopenharmony_ci			label = "File System";
47062306a36Sopenharmony_ci			reg = <0x540000 0x1ac0000>;
47162306a36Sopenharmony_ci		};
47262306a36Sopenharmony_ci	};
47362306a36Sopenharmony_ci};
47462306a36Sopenharmony_ci
47562306a36Sopenharmony_ci&mcspi3 {
47662306a36Sopenharmony_ci	/* DMA event numbers stolen from MCASP */
47762306a36Sopenharmony_ci	dmas = <&edma_xbar 8 0 16 &edma_xbar 9 0 17
47862306a36Sopenharmony_ci		&edma_xbar 10 0 18 &edma_xbar 11 0 19>;
47962306a36Sopenharmony_ci	dma-names = "tx0", "rx0", "tx1", "rx1";
48062306a36Sopenharmony_ci};
48162306a36Sopenharmony_ci
48262306a36Sopenharmony_ci&mcspi4 {
48362306a36Sopenharmony_ci	pinctrl-names = "default";
48462306a36Sopenharmony_ci	pinctrl-0 = <&spi4_pins>;
48562306a36Sopenharmony_ci
48662306a36Sopenharmony_ci	/* DMA event numbers stolen from MCASP, MCBSP */
48762306a36Sopenharmony_ci	dmas = <&edma_xbar 12 0 20 &edma_xbar 13 0 21>;
48862306a36Sopenharmony_ci	dma-names = "tx0", "rx0";
48962306a36Sopenharmony_ci};
490